From ac6d567b7a10ac8c27a590c4e1db13aaf4366ee6 Mon Sep 17 00:00:00 2001 From: Rajesh Kemisetti Date: Thu, 26 Jan 2017 18:08:16 +0530 Subject: [PATCH] msm: kgsl: Do required clock settings for SDM660 GPU Enable retention of memory and periphery logics for GPU core clock. If the setting is not done then GPU might get stale data while switching from NAP to ACTIVE and which leads to page faults or hangs. Clock settings need to be handled by client drivers only and hence do it in KGSL driver. Change-Id: Iea3fd720e2a0eda9f6ee719177a8898bc2bd75e4 Signed-off-by: Rajesh Kemisetti --- drivers/gpu/msm/adreno_a5xx.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/msm/adreno_a5xx.c b/drivers/gpu/msm/adreno_a5xx.c index 15c4b9427f8e..7e2e3aa91fce 100644 --- a/drivers/gpu/msm/adreno_a5xx.c +++ b/drivers/gpu/msm/adreno_a5xx.c @@ -1639,7 +1639,8 @@ static void a5xx_pwrlevel_change_settings(struct adreno_device *adreno_dev, static void a5xx_clk_set_options(struct adreno_device *adreno_dev, const char *name, struct clk *clk) { - if (adreno_is_a540(adreno_dev)) { + /* Handle clock settings for GFX PSCBCs */ + if (adreno_is_a540(adreno_dev) || adreno_is_a512(adreno_dev)) { if (!strcmp(name, "mem_iface_clk")) { clk_set_flags(clk, CLKFLAG_NORETAIN_PERIPH); clk_set_flags(clk, CLKFLAG_NORETAIN_MEM);