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msm: mdss: handle proper configuration of DSI PHY GLBL control

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In case of independent dual DSI configuration, the GLBL_TEST_CTRL
register for both the DSI PHY should be set to 1. This change adds
proper check to handle this case.

Change-Id: I6c16c1a359541ea0d3c5430a331f47b55e4bd8cc
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
This commit is contained in:
Sandeep Panda 2015-07-16 15:29:05 +05:30 • committed by David Keitel
parent 9e41f712a9
commit ac94acf4a9
1 changed files with 9 additions and 4 deletions
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13
drivers/video/fbdev/msm/msm_mdss_io_8974.c
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@ -649,11 +649,16 @@ static void mdss_dsi_28nm_phy_config(struct mdss_dsi_ctrl_pdata *ctrl_pdata)
wmb();
/* DSI_0_PHY_DSIPHY_GLBL_TEST_CTRL */
if (((ctrl_pdata->panel_data).panel_info.pdest == DISPLAY_1) ||
(ctrl_pdata->shared_data->hw_rev == MDSS_DSI_HW_REV_103_1))
if (!mdss_dsi_is_hw_config_split(ctrl_pdata->shared_data)) {
MIPI_OUTP((ctrl_pdata->phy_io.base) + 0x01d4, 0x01);
else
MIPI_OUTP((ctrl_pdata->phy_io.base) + 0x01d4, 0x00);
} else {
if (((ctrl_pdata->panel_data).panel_info.pdest == DISPLAY_1) ||
(ctrl_pdata->shared_data->hw_rev == MDSS_DSI_HW_REV_103_1))
MIPI_OUTP((ctrl_pdata->phy_io.base) + 0x01d4, 0x01);
else
MIPI_OUTP((ctrl_pdata->phy_io.base) + 0x01d4, 0x00);
}
/* ensure DSIPHY_GLBL_TEST_CTRL is set */
wmb();
/* MMSS_DSI_0_PHY_DSIPHY_CTRL_0 */