mdss: dsi: ensure proper clearing of DSI RDBK registers
During high performance scenarios, sometimes the DSI RDBK registers are not getting cleared. This can cause improper read return values since the RDBK data count will not get reset in such cases. Add memory barriers during reset of RDBK registers to ensure that the registers are cleared. Change-Id: I870744b58c3e4064ca9f04f92e831d69139336db Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
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@ -1395,7 +1395,9 @@ do_send:
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if (ctrl_rev >= MDSS_DSI_HW_REV_101) {
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if (ctrl_rev >= MDSS_DSI_HW_REV_101) {
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/* clear the RDBK_DATA registers */
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/* clear the RDBK_DATA registers */
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MIPI_OUTP(ctrl->ctrl_base + 0x01d4, 0x1);
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MIPI_OUTP(ctrl->ctrl_base + 0x01d4, 0x1);
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wmb(); /* make sure the RDBK registers are cleared */
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MIPI_OUTP(ctrl->ctrl_base + 0x01d4, 0x0);
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MIPI_OUTP(ctrl->ctrl_base + 0x01d4, 0x0);
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wmb(); /* make sure the RDBK registers are cleared */
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}
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}
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mdss_dsi_wait4video_eng_busy(ctrl); /* video mode only */
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mdss_dsi_wait4video_eng_busy(ctrl); /* video mode only */
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