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phy: qcom-ufs: Modify the vdd-phy min-max range

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There are 2 issues with setting the vdd-phy voltage:
1. The min & max range that's defined is 1v, whereas
   0.925 (+/- 5%) is the required voltage. A range of
   0.8v to 0.925v would suffice.
2. This defined range is over-ridden with the current
   rail-voltage. This assumes that some consumer has
   set the regulator to the correct voltage.

This change corrects the defined min/max range to
0.8v-0.925v for vdd-phy.
It also removes the code that's causing [2].

CRs-fixed: 1095116
Change-Id: I943bc4f38385036b21c1f9a2e479d6e94ac12813
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
This commit is contained in:
Asutosh Das 2016-12-05 11:41:40 +05:30 • committed by Gerrit - the friendly Code Review server
parent 69352ff8b4
commit ae8dff9cb7
1 changed files with 2 additions and 7 deletions
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9
drivers/phy/phy-qcom-ufs.c
View file

@ -15,8 +15,8 @@
#include "phy-qcom-ufs-i.h" #include "phy-qcom-ufs-i.h"
#define MAX_PROP_NAME 32 #define MAX_PROP_NAME 32
#define VDDA_PHY_MIN_UV 1000000 #define VDDA_PHY_MIN_UV 800000
#define VDDA_PHY_MAX_UV 1000000 #define VDDA_PHY_MAX_UV 925000
#define VDDA_PLL_MIN_UV 1200000 #define VDDA_PLL_MIN_UV 1200000
#define VDDA_PLL_MAX_UV 1800000 #define VDDA_PLL_MAX_UV 1800000
#define VDDP_REF_CLK_MIN_UV 1200000 #define VDDP_REF_CLK_MIN_UV 1200000
@ -239,7 +239,6 @@ ufs_qcom_phy_init_vregulators(struct phy *generic_phy,
struct ufs_qcom_phy *phy_common) struct ufs_qcom_phy *phy_common)
{ {
int err; int err;
int vdda_phy_uV;
err = ufs_qcom_phy_init_vreg(generic_phy, &phy_common->vdda_pll, err = ufs_qcom_phy_init_vreg(generic_phy, &phy_common->vdda_pll,
"vdda-pll"); "vdda-pll");
@ -251,10 +250,6 @@ ufs_qcom_phy_init_vregulators(struct phy *generic_phy,
if (err) if (err)
goto out; goto out;
vdda_phy_uV = regulator_get_voltage(phy_common->vdda_phy.reg);
phy_common->vdda_phy.max_uV = vdda_phy_uV;
phy_common->vdda_phy.min_uV = vdda_phy_uV;
/* vddp-ref-clk-* properties are optional */ /* vddp-ref-clk-* properties are optional */
__ufs_qcom_phy_init_vreg(generic_phy, &phy_common->vddp_ref_clk, __ufs_qcom_phy_init_vreg(generic_phy, &phy_common->vddp_ref_clk,
"vddp-ref-clk", true); "vddp-ref-clk", true);