Merge "msm: ipa: apply reset wa to GPI channels"
This commit is contained in:
commit
af1b766297
3 changed files with 42 additions and 2 deletions
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@ -857,6 +857,8 @@ static int ipa3_reset_with_open_aggr_frame_wa(u32 clnt_hdl,
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struct gsi_xfer_elem xfer_elem;
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int i;
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int aggr_active_bitmap = 0;
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bool pipe_suspended = false;
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struct ipa_ep_cfg_ctrl ctrl;
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IPADBG("Applying reset channel with open aggregation frame WA\n");
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ipahal_write_reg(IPA_AGGR_FORCE_CLOSE, (1 << clnt_hdl));
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@ -883,6 +885,15 @@ static int ipa3_reset_with_open_aggr_frame_wa(u32 clnt_hdl,
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if (result)
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return -EFAULT;
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ipahal_read_reg_n_fields(IPA_ENDP_INIT_CTRL_n, clnt_hdl, &ctrl);
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if (ctrl.ipa_ep_suspend) {
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IPADBG("pipe is suspended, remove suspend\n");
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pipe_suspended = true;
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ctrl.ipa_ep_suspend = false;
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ipahal_write_reg_n_fields(IPA_ENDP_INIT_CTRL_n,
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clnt_hdl, &ctrl);
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}
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/* Start channel and put 1 Byte descriptor on it */
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gsi_res = gsi_start_channel(ep->gsi_chan_hdl);
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if (gsi_res != GSI_STATUS_SUCCESS) {
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@ -942,6 +953,13 @@ static int ipa3_reset_with_open_aggr_frame_wa(u32 clnt_hdl,
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*/
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msleep(IPA_POLL_AGGR_STATE_SLEEP_MSEC);
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if (pipe_suspended) {
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IPADBG("suspend the pipe again\n");
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ctrl.ipa_ep_suspend = true;
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ipahal_write_reg_n_fields(IPA_ENDP_INIT_CTRL_n,
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clnt_hdl, &ctrl);
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}
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/* Restore channels properties */
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result = ipa3_restore_channel_properties(ep, &orig_chan_props,
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&orig_chan_scratch);
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@ -956,6 +974,12 @@ queue_xfer_fail:
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ipa3_stop_gsi_channel(clnt_hdl);
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dma_free_coherent(ipa3_ctx->pdev, 1, buff, dma_addr);
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start_chan_fail:
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if (pipe_suspended) {
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IPADBG("suspend the pipe again\n");
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ctrl.ipa_ep_suspend = true;
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ipahal_write_reg_n_fields(IPA_ENDP_INIT_CTRL_n,
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clnt_hdl, &ctrl);
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}
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ipa3_restore_channel_properties(ep, &orig_chan_props,
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&orig_chan_scratch);
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restore_props_fail:
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@ -1568,7 +1568,7 @@ int ipa3_teardown_sys_pipe(u32 clnt_hdl)
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BUG();
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return result;
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}
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result = gsi_reset_channel(ep->gsi_chan_hdl);
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result = ipa3_reset_gsi_channel(clnt_hdl);
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if (result != GSI_STATUS_SUCCESS) {
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IPAERR("Failed to reset chan: %d.\n", result);
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BUG();
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@ -646,6 +646,21 @@ static void ipareg_construct_endp_init_ctrl_n(enum ipahal_reg_name reg,
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IPA_ENDP_INIT_CTRL_n_ENDP_DELAY_BMSK);
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}
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static void ipareg_parse_endp_init_ctrl_n(enum ipahal_reg_name reg,
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void *fields, u32 val)
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{
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struct ipa_ep_cfg_ctrl *ep_ctrl =
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(struct ipa_ep_cfg_ctrl *)fields;
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ep_ctrl->ipa_ep_suspend =
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((val & IPA_ENDP_INIT_CTRL_n_ENDP_SUSPEND_BMSK) >>
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IPA_ENDP_INIT_CTRL_n_ENDP_SUSPEND_SHFT);
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ep_ctrl->ipa_ep_delay =
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((val & IPA_ENDP_INIT_CTRL_n_ENDP_DELAY_BMSK) >>
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IPA_ENDP_INIT_CTRL_n_ENDP_DELAY_SHFT);
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}
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static void ipareg_construct_endp_init_ctrl_scnd_n(enum ipahal_reg_name reg,
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const void *fields, u32 *val)
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{
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@ -1018,7 +1033,8 @@ static struct ipahal_reg_obj ipahal_reg_objs[IPA_HW_MAX][IPA_REG_MAX] = {
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ipareg_construct_endp_init_nat_n, ipareg_parse_dummy,
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0x0000080C, 0x70},
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[IPA_HW_v3_0][IPA_ENDP_INIT_CTRL_n] = {
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ipareg_construct_endp_init_ctrl_n, ipareg_parse_dummy,
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ipareg_construct_endp_init_ctrl_n,
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ipareg_parse_endp_init_ctrl_n,
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0x00000800, 0x70},
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[IPA_HW_v3_0][IPA_ENDP_INIT_CTRL_SCND_n] = {
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ipareg_construct_endp_init_ctrl_scnd_n, ipareg_parse_dummy,
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