evie/android_kernel_oneplus_msm8998
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Merge "msm: ipa: apply reset wa to GPI channels"

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Linux Build Service Account 2017-05-10 23:03:42 -07:00 • committed by Gerrit - the friendly Code Review server
commit af1b766297
3 changed files with 42 additions and 2 deletions
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24
drivers/platform/msm/ipa/ipa_v3/ipa_client.c
View file

@ -857,6 +857,8 @@ static int ipa3_reset_with_open_aggr_frame_wa(u32 clnt_hdl,
struct gsi_xfer_elem xfer_elem; struct gsi_xfer_elem xfer_elem;
int i; int i;
int aggr_active_bitmap = 0; int aggr_active_bitmap = 0;
bool pipe_suspended = false;
struct ipa_ep_cfg_ctrl ctrl;
IPADBG("Applying reset channel with open aggregation frame WA\n"); IPADBG("Applying reset channel with open aggregation frame WA\n");
ipahal_write_reg(IPA_AGGR_FORCE_CLOSE, (1 << clnt_hdl)); ipahal_write_reg(IPA_AGGR_FORCE_CLOSE, (1 << clnt_hdl));
@ -883,6 +885,15 @@ static int ipa3_reset_with_open_aggr_frame_wa(u32 clnt_hdl,
if (result) if (result)
return -EFAULT; return -EFAULT;
ipahal_read_reg_n_fields(IPA_ENDP_INIT_CTRL_n, clnt_hdl, &ctrl);
if (ctrl.ipa_ep_suspend) {
IPADBG("pipe is suspended, remove suspend\n");
pipe_suspended = true;
ctrl.ipa_ep_suspend = false;
ipahal_write_reg_n_fields(IPA_ENDP_INIT_CTRL_n,
clnt_hdl, &ctrl);
}
/* Start channel and put 1 Byte descriptor on it */ /* Start channel and put 1 Byte descriptor on it */
gsi_res = gsi_start_channel(ep->gsi_chan_hdl); gsi_res = gsi_start_channel(ep->gsi_chan_hdl);
if (gsi_res != GSI_STATUS_SUCCESS) { if (gsi_res != GSI_STATUS_SUCCESS) {
@ -942,6 +953,13 @@ static int ipa3_reset_with_open_aggr_frame_wa(u32 clnt_hdl,
*/ */
msleep(IPA_POLL_AGGR_STATE_SLEEP_MSEC); msleep(IPA_POLL_AGGR_STATE_SLEEP_MSEC);
if (pipe_suspended) {
IPADBG("suspend the pipe again\n");
ctrl.ipa_ep_suspend = true;
ipahal_write_reg_n_fields(IPA_ENDP_INIT_CTRL_n,
clnt_hdl, &ctrl);
}
/* Restore channels properties */ /* Restore channels properties */
result = ipa3_restore_channel_properties(ep, &orig_chan_props, result = ipa3_restore_channel_properties(ep, &orig_chan_props,
&orig_chan_scratch); &orig_chan_scratch);
@ -956,6 +974,12 @@ queue_xfer_fail:
ipa3_stop_gsi_channel(clnt_hdl); ipa3_stop_gsi_channel(clnt_hdl);
dma_free_coherent(ipa3_ctx->pdev, 1, buff, dma_addr); dma_free_coherent(ipa3_ctx->pdev, 1, buff, dma_addr);
start_chan_fail: start_chan_fail:
if (pipe_suspended) {
IPADBG("suspend the pipe again\n");
ctrl.ipa_ep_suspend = true;
ipahal_write_reg_n_fields(IPA_ENDP_INIT_CTRL_n,
clnt_hdl, &ctrl);
}
ipa3_restore_channel_properties(ep, &orig_chan_props, ipa3_restore_channel_properties(ep, &orig_chan_props,
&orig_chan_scratch); &orig_chan_scratch);
restore_props_fail: restore_props_fail:

2
drivers/platform/msm/ipa/ipa_v3/ipa_dp.c
View file

@ -1568,7 +1568,7 @@ int ipa3_teardown_sys_pipe(u32 clnt_hdl)
BUG(); BUG();
return result; return result;
} }
result = gsi_reset_channel(ep->gsi_chan_hdl); result = ipa3_reset_gsi_channel(clnt_hdl);
if (result != GSI_STATUS_SUCCESS) { if (result != GSI_STATUS_SUCCESS) {
IPAERR("Failed to reset chan: %d.\n", result); IPAERR("Failed to reset chan: %d.\n", result);
BUG(); BUG();

18
drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal_reg.c
View file

@ -646,6 +646,21 @@ static void ipareg_construct_endp_init_ctrl_n(enum ipahal_reg_name reg,
IPA_ENDP_INIT_CTRL_n_ENDP_DELAY_BMSK); IPA_ENDP_INIT_CTRL_n_ENDP_DELAY_BMSK);
} }
static void ipareg_parse_endp_init_ctrl_n(enum ipahal_reg_name reg,
void *fields, u32 val)
{
struct ipa_ep_cfg_ctrl *ep_ctrl =
(struct ipa_ep_cfg_ctrl *)fields;
ep_ctrl->ipa_ep_suspend =
((val & IPA_ENDP_INIT_CTRL_n_ENDP_SUSPEND_BMSK) >>
IPA_ENDP_INIT_CTRL_n_ENDP_SUSPEND_SHFT);
ep_ctrl->ipa_ep_delay =
((val & IPA_ENDP_INIT_CTRL_n_ENDP_DELAY_BMSK) >>
IPA_ENDP_INIT_CTRL_n_ENDP_DELAY_SHFT);
}
static void ipareg_construct_endp_init_ctrl_scnd_n(enum ipahal_reg_name reg, static void ipareg_construct_endp_init_ctrl_scnd_n(enum ipahal_reg_name reg,
const void *fields, u32 *val) const void *fields, u32 *val)
{ {
@ -1018,7 +1033,8 @@ static struct ipahal_reg_obj ipahal_reg_objs[IPA_HW_MAX][IPA_REG_MAX] = {
ipareg_construct_endp_init_nat_n, ipareg_parse_dummy, ipareg_construct_endp_init_nat_n, ipareg_parse_dummy,
0x0000080C, 0x70}, 0x0000080C, 0x70},
[IPA_HW_v3_0][IPA_ENDP_INIT_CTRL_n] = { [IPA_HW_v3_0][IPA_ENDP_INIT_CTRL_n] = {
ipareg_construct_endp_init_ctrl_n, ipareg_parse_dummy, ipareg_construct_endp_init_ctrl_n,
ipareg_parse_endp_init_ctrl_n,
0x00000800, 0x70}, 0x00000800, 0x70},
[IPA_HW_v3_0][IPA_ENDP_INIT_CTRL_SCND_n] = { [IPA_HW_v3_0][IPA_ENDP_INIT_CTRL_SCND_n] = {
ipareg_construct_endp_init_ctrl_scnd_n, ipareg_parse_dummy, ipareg_construct_endp_init_ctrl_scnd_n, ipareg_parse_dummy,