evie/android_kernel_oneplus_msm8998
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phylib: SIOCGMIIREG/SIOCSMIIREG: allow access to all mdio addresses

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phylib would silently ignore the phy_id argument to these ioctls and
perform the read/write with the active phydev address, whereas most
non-phylib drivers seem to allow access to all mdio addresses
(E.G. pcnet_cs).

Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Peter Korsgaard 2011-03-10 06:52:13 +00:00 • committed by David S. Miller
parent dc187cb381
commit af1dc13e60
1 changed files with 5 additions and 3 deletions
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8
drivers/net/phy/phy.c
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@ -319,7 +319,8 @@ int phy_mii_ioctl(struct phy_device *phydev,
/* fall through */ /* fall through */
case SIOCGMIIREG: case SIOCGMIIREG:
mii_data->val_out = phy_read(phydev, mii_data->reg_num); mii_data->val_out = mdiobus_read(phydev->bus, mii_data->phy_id,
mii_data->reg_num);
break; break;
case SIOCSMIIREG: case SIOCSMIIREG:
@ -350,8 +351,9 @@ int phy_mii_ioctl(struct phy_device *phydev,
} }
} }
phy_write(phydev, mii_data->reg_num, val); mdiobus_write(phydev->bus, mii_data->phy_id,
mii_data->reg_num, val);
if (mii_data->reg_num == MII_BMCR && if (mii_data->reg_num == MII_BMCR &&
val & BMCR_RESET && val & BMCR_RESET &&
phydev->drv->config_init) { phydev->drv->config_init) {