pasemi_mac: Move RX/TX section enablement to dma_lib
Also stop both rx and tx sections before changing the configuration of the dma device during init. Signed-off-by: Olof Johansson <olof@lixom.net> Acked-by: Jeff Garzik <jgarzik@pobox.com>
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6a2d322e4b
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afea3278f7
3 changed files with 36 additions and 7 deletions
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@ -17,6 +17,7 @@
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/pci.h>
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@ -410,6 +411,7 @@ int pasemi_dma_init(void)
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struct resource res;
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struct resource res;
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struct device_node *dn;
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struct device_node *dn;
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int i, intf, err = 0;
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int i, intf, err = 0;
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unsigned long timeout;
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u32 tmp;
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u32 tmp;
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if (!machine_is(pasemi))
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if (!machine_is(pasemi))
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@ -478,6 +480,34 @@ int pasemi_dma_init(void)
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for (i = 0; i < MAX_RXCH; i++)
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for (i = 0; i < MAX_RXCH; i++)
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__set_bit(i, rxch_free);
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__set_bit(i, rxch_free);
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timeout = jiffies + HZ;
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pasemi_write_dma_reg(PAS_DMA_COM_RXCMD, 0);
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while (pasemi_read_dma_reg(PAS_DMA_COM_RXSTA) & 1) {
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if (time_after(jiffies, timeout)) {
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pr_warning("Warning: Could not disable RX section\n");
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break;
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}
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}
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timeout = jiffies + HZ;
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pasemi_write_dma_reg(PAS_DMA_COM_TXCMD, 0);
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while (pasemi_read_dma_reg(PAS_DMA_COM_TXSTA) & 1) {
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if (time_after(jiffies, timeout)) {
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pr_warning("Warning: Could not disable TX section\n");
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break;
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}
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}
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/* setup resource allocations for the different DMA sections */
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tmp = pasemi_read_dma_reg(PAS_DMA_COM_CFG);
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pasemi_write_dma_reg(PAS_DMA_COM_CFG, tmp | 0x18000000);
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/* enable tx section */
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pasemi_write_dma_reg(PAS_DMA_COM_TXCMD, PAS_DMA_COM_TXCMD_EN);
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/* enable rx section */
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pasemi_write_dma_reg(PAS_DMA_COM_RXCMD, PAS_DMA_COM_RXCMD_EN);
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printk(KERN_INFO "PA Semi PWRficient DMA library initialized "
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printk(KERN_INFO "PA Semi PWRficient DMA library initialized "
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"(%d tx, %d rx channels)\n", num_txch, num_rxch);
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"(%d tx, %d rx channels)\n", num_txch, num_rxch);
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@ -1043,12 +1043,6 @@ static int pasemi_mac_open(struct net_device *dev)
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unsigned int flags;
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unsigned int flags;
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int ret;
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int ret;
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/* enable rx section */
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write_dma_reg(PAS_DMA_COM_RXCMD, PAS_DMA_COM_RXCMD_EN);
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/* enable tx section */
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write_dma_reg(PAS_DMA_COM_TXCMD, PAS_DMA_COM_TXCMD_EN);
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flags = PAS_MAC_CFG_TXP_FCE | PAS_MAC_CFG_TXP_FPC(3) |
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flags = PAS_MAC_CFG_TXP_FCE | PAS_MAC_CFG_TXP_FPC(3) |
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PAS_MAC_CFG_TXP_SL(3) | PAS_MAC_CFG_TXP_COB(0xf) |
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PAS_MAC_CFG_TXP_SL(3) | PAS_MAC_CFG_TXP_COB(0xf) |
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PAS_MAC_CFG_TXP_TIFT(8) | PAS_MAC_CFG_TXP_TIFG(12);
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PAS_MAC_CFG_TXP_TIFT(8) | PAS_MAC_CFG_TXP_TIFG(12);
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright (C) 2006 PA Semi, Inc
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* Copyright (C) 2006-2008 PA Semi, Inc
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*
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*
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* Hardware register layout and descriptor formats for the on-board
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* Hardware register layout and descriptor formats for the on-board
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* DMA engine on PA Semi PWRficient. Used by ethernet, function and security
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* DMA engine on PA Semi PWRficient. Used by ethernet, function and security
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@ -40,6 +40,11 @@ enum {
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PAS_DMA_COM_TXSTA = 0x104, /* Transmit Status Register */
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PAS_DMA_COM_TXSTA = 0x104, /* Transmit Status Register */
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PAS_DMA_COM_RXCMD = 0x108, /* Receive Command Register */
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PAS_DMA_COM_RXCMD = 0x108, /* Receive Command Register */
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PAS_DMA_COM_RXSTA = 0x10c, /* Receive Status Register */
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PAS_DMA_COM_RXSTA = 0x10c, /* Receive Status Register */
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PAS_DMA_COM_CFG = 0x114, /* Common config reg */
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PAS_DMA_TXF_SFLG0 = 0x140, /* Set flags */
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PAS_DMA_TXF_SFLG1 = 0x144, /* Set flags */
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PAS_DMA_TXF_CFLG0 = 0x148, /* Set flags */
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PAS_DMA_TXF_CFLG1 = 0x14c, /* Set flags */
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};
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};
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