diff --git a/arch/arm/boot/dts/qcom/msmcobalt.dtsi b/arch/arm/boot/dts/qcom/msmcobalt.dtsi
index 1fa683bb08f3..66100e2f6c9c 100644
--- a/arch/arm/boot/dts/qcom/msmcobalt.dtsi
+++ b/arch/arm/boot/dts/qcom/msmcobalt.dtsi
@@ -1726,11 +1726,10 @@
 			<&clock_gcc clk_gcc_aggre1_usb3_axi_clk>,
 			<&clock_gcc clk_gcc_usb30_mock_utmi_clk>,
 			<&clock_gcc clk_gcc_usb30_sleep_clk>,
-			<&clock_gcc clk_gcc_usb_phy_cfg_ahb2phy_clk>,
 			<&clock_gcc clk_cxo_dwc3_clk>;
 
 		clock-names = "core_clk", "iface_clk", "bus_aggr_clk",
-				"utmi_clk", "sleep_clk", "cfg_ahb_clk", "xo";
+				"utmi_clk", "sleep_clk", "xo";
 
 		dwc3@a800000 {
 			compatible = "snps,dwc3";
@@ -1798,11 +1797,9 @@
 
 		clocks = <&clock_gcc clk_ln_bb_clk1>,
 			 <&clock_gcc clk_gcc_rx1_usb2_clkref_clk>,
-			 <&clock_gcc clk_gcc_usb_phy_cfg_ahb2phy_clk>,
 			 <&clock_gcc clk_gcc_qusb2phy_prim_reset>;
 
-		clock-names = "ref_clk_src", "ref_clk", "cfg_ahb_clk",
-			      "phy_reset";
+		clock-names = "ref_clk_src", "ref_clk", "phy_reset";
 	};
 
 	ssphy: ssphy@c010000 {
@@ -1950,13 +1947,12 @@
 
 		clocks = <&clock_gcc clk_gcc_usb3_phy_aux_clk>,
 			 <&clock_gcc clk_gcc_usb3_phy_pipe_clk>,
-			 <&clock_gcc clk_gcc_usb_phy_cfg_ahb2phy_clk>,
 			 <&clock_gcc clk_gcc_usb3_phy_reset>,
 			 <&clock_gcc clk_gcc_usb3phy_phy_reset>,
 			 <&clock_gcc clk_ln_bb_clk1>,
 			 <&clock_gcc clk_gcc_usb3_clkref_clk>;
 
-		clock-names = "aux_clk", "pipe_clk", "cfg_ahb_clk", "phy_reset",
+		clock-names = "aux_clk", "pipe_clk", "phy_reset",
 			      "phy_phy_reset", "ref_clk_src", "ref_clk";
 	};
 
diff --git a/drivers/clk/msm/clock-gcc-cobalt.c b/drivers/clk/msm/clock-gcc-cobalt.c
index 1756157c996d..da887fe46749 100644
--- a/drivers/clk/msm/clock-gcc-cobalt.c
+++ b/drivers/clk/msm/clock-gcc-cobalt.c
@@ -2197,17 +2197,6 @@ static struct reset_clk gcc_qusb2phy_sec_reset = {
 	},
 };
 
-static struct branch_clk gcc_usb_phy_cfg_ahb2phy_clk = {
-	.cbcr_reg = GCC_USB_PHY_CFG_AHB2PHY_CBCR,
-	.has_sibling = 1,
-	.base = &virt_base,
-	.c = {
-		.dbg_name = "gcc_usb_phy_cfg_ahb2phy_clk",
-		.ops = &clk_ops_branch,
-		CLK_INIT(gcc_usb_phy_cfg_ahb2phy_clk.c),
-	},
-};
-
 static struct branch_clk gcc_wcss_ahb_s0_clk = {
 	.cbcr_reg = GCC_WCSS_AHB_S0_CBCR,
 	.has_sibling = 1,
@@ -2393,7 +2382,6 @@ static struct mux_clk gcc_debug_mux = {
 		{ &gcc_usb30_mock_utmi_clk.c, 0x0040 },
 		{ &gcc_usb3_phy_aux_clk.c, 0x0041 },
 		{ &gcc_usb3_phy_pipe_clk.c, 0x0042 },
-		{ &gcc_usb_phy_cfg_ahb2phy_clk.c, 0x0045 },
 		{ &gcc_sdcc2_apps_clk.c, 0x0046 },
 		{ &gcc_sdcc2_ahb_clk.c, 0x0047 },
 		{ &gcc_sdcc4_apps_clk.c, 0x0048 },
@@ -2701,7 +2689,6 @@ static struct clk_lookup msm_clocks_gcc_cobalt[] = {
 	CLK_LIST(gcc_usb30_sleep_clk),
 	CLK_LIST(gcc_usb3_phy_aux_clk),
 	CLK_LIST(gcc_usb3_phy_pipe_clk),
-	CLK_LIST(gcc_usb_phy_cfg_ahb2phy_clk),
 	CLK_LIST(gcc_prng_ahb_clk),
 	CLK_LIST(gcc_boot_rom_ahb_clk),
 	CLK_LIST(gcc_wcss_ahb_s0_clk),
diff --git a/include/dt-bindings/clock/msm-clocks-cobalt.h b/include/dt-bindings/clock/msm-clocks-cobalt.h
index 5cdeb01a173b..6c45761b52de 100644
--- a/include/dt-bindings/clock/msm-clocks-cobalt.h
+++ b/include/dt-bindings/clock/msm-clocks-cobalt.h
@@ -242,7 +242,6 @@
 #define clk_gcc_usb30_sleep_clk			0xd0b65c92
 #define clk_gcc_usb3_phy_aux_clk		0x0d9a36e0
 #define clk_gcc_usb3_phy_pipe_clk		0xf279aff2
-#define clk_gcc_usb_phy_cfg_ahb2phy_clk		0xd1231a0e
 #define clk_gcc_wcss_ahb_s0_clk			0x639a01c4
 #define clk_gcc_wcss_axi_m_clk			0xabc48ebd
 #define clk_gcc_wcss_ecahb_clk			0xf1815ce9
diff --git a/include/dt-bindings/clock/msm-clocks-hwio-cobalt.h b/include/dt-bindings/clock/msm-clocks-hwio-cobalt.h
index af26f826e18c..9591133b0627 100644
--- a/include/dt-bindings/clock/msm-clocks-hwio-cobalt.h
+++ b/include/dt-bindings/clock/msm-clocks-hwio-cobalt.h
@@ -214,7 +214,6 @@
 #define GCC_USB3_PHY_AUX_CBCR					0x50000
 #define GCC_USB3_PHY_PIPE_CBCR					0x50004
 #define GCC_USB3PHY_PHY_BCR					0x50024
-#define GCC_USB_PHY_CFG_AHB2PHY_CBCR				0x6A004
 #define GCC_WCSS_AHB_S0_CBCR					0x11004
 #define GCC_WCSS_AXI_M_CBCR					0x11008
 #define GCC_WCSS_ECAHB_CBCR					0x1100C