evie/android_kernel_oneplus_msm8998
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msm: mdss: update the programmable line value during VRR

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Update the programmable fetch start line register during variable
refresh rate (VRR) operations. This is needed since the vertical
front porch value changes when there is a change in fps. Also, do
not perform fetch start configuration during boot up when
continuous splash screen is enabled. The feature will be enabled in
LK. This is needed for proper VRR operations until first suspend
resume.

Change-Id: I5c82bc520da53db958ad0fad4217f00d92a25cae
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
This commit is contained in:
Padmanabhan Komanduru 2014-09-10 19:30:38 +05:30 • committed by David Keitel
parent 31873f1345
commit b3cf731350
1 changed files with 19 additions and 3 deletions
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22
drivers/video/fbdev/msm/mdss_mdp_intf_video.c
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@ -68,6 +68,9 @@ struct mdss_mdp_video_ctx {
struct list_head vsync_handlers;
};
static void mdss_mdp_fetch_start_config(struct mdss_mdp_video_ctx *ctx,
struct mdss_mdp_ctl *ctl);
static inline void mdp_video_write(struct mdss_mdp_video_ctx *ctx,
u32 reg, u32 val)
{
@ -665,7 +668,7 @@ static void mdss_mdp_video_timegen_flush(struct mdss_mdp_ctl *ctl,
static int mdss_mdp_video_config_fps(struct mdss_mdp_ctl *ctl,
struct mdss_mdp_ctl *sctl, int new_fps)
{
struct mdss_mdp_video_ctx *ctx;
struct mdss_mdp_video_ctx *ctx, *sctx = NULL;
struct mdss_panel_data *pdata;
int rc = 0;
u32 hsync_period, vsync_period;
@ -679,6 +682,14 @@ static int mdss_mdp_video_config_fps(struct mdss_mdp_ctl *ctl,
return -ENODEV;
}
if (sctl) {
sctx = (struct mdss_mdp_video_ctx *) sctl->priv_data;
if (!sctx) {
pr_err("invalid ctx\n");
return -ENODEV;
}
}
pdata = ctl->panel_data;
if (pdata == NULL) {
pr_err("%s: Invalid panel data\n", __func__);
@ -761,6 +772,10 @@ static int mdss_mdp_video_config_fps(struct mdss_mdp_ctl *ctl,
WARN(rc, "intf %d panel fps update error (%d)\n",
ctl->intf_num, rc);
mdss_mdp_fetch_start_config(ctx, ctl);
if (sctl)
mdss_mdp_fetch_start_config(sctx, sctl);
/* MDP INTF registers support DB on 8916/8939 */
if (!wait4vsync)
mdss_mdp_video_timegen_flush(ctl, sctl);
@ -1046,14 +1061,15 @@ static int mdss_mdp_video_intfs_setup(struct mdss_mdp_ctl *ctl,
pinfo->bpp);
itp.vsync_pulse_width = pinfo->lcdc.v_pulse_width;
if (!ctl->panel_data->panel_info.cont_splash_enabled)
if (!ctl->panel_data->panel_info.cont_splash_enabled) {
if (mdss_mdp_video_timegen_setup(ctl, &itp)) {
pr_err("unable to set timing parameters intfs: %d\n",
(inum + MDSS_MDP_INTF0));
return -EINVAL;
}
mdss_mdp_fetch_start_config(ctx, ctl);
}
mdss_mdp_fetch_start_config(ctx, ctl);
mdp_video_write(ctx, MDSS_MDP_REG_INTF_PANEL_FORMAT, ctl->dst_format);
return 0;