msm: mdss: handle continuous splash screen for dual DSI cases
In the current implementation, the continuous splash screen flag is set based on whether there is handoff pending in MDP or not. With the dual DSI use-case now in place, there is possibility that the primary panel has continuous splash enabled whereas the other panel doesn't have the feature enabled. Add change to take care of this by checking if a particular interface is enabled in MDP_INTF_SEL register to set the cont. splash screen flag. Remove the DT entries for continuous splash screen since it is no longer needed after this change. Change-Id: I4d617386c8f5d166de76b79a10680d024320a889 Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org> [cip@codeaurora.org: Removed .dtsi changes] Signed-off-by: Clarence Ip <cip@codeaurora.org>
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14 changed files with 82 additions and 55 deletions
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@ -79,11 +79,6 @@ then 3 options can be tried.
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Optional properties:
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- qcom,mdss-dsi-panel-name: A string used as a descriptive name of the panel
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- qcom,cont-splash-enabled: Boolean used to enable continuous splash mode.
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If this property is specified, it is required to
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to specify the memory reserved for the splash
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screen using the qcom,memblock-reserve binding
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for the framebuffer device attached to the panel.
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- qcom,cmd-sync-wait-broadcast: Boolean used to broadcast dcs command to panels.
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- qcom,mdss-dsi-fbc-enable: Boolean used to enable frame buffer compression mode.
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- qcom,mdss-dsi-fbc-slice-height: Slice height(in lines) of compressed block.
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@ -30,7 +30,6 @@ Optional properties
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Optional properties:
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- qcom,cont-splash-enabled: Boolean used to enable continuous splash mode.
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- qcom,mdss-brightness-max-level: Specifies the max brightness level supported.
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255 = default value.
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@ -82,7 +82,6 @@ Example:
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qcom,hdmi-tx-ddc-clk = <&msmgpio 32 0>;
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qcom,hdmi-tx-ddc-data = <&msmgpio 33 0>;
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qcom,hdmi-tx-hpd = <&msmgpio 34 0>;
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qcom,cont-splash-enabled;
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qcom,hdmi-tx-mux-lpm = <&msmgpio 27 0>;
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qcom,hdmi-tx-mux-en = <&msmgpio 83 0>;
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@ -1402,6 +1402,28 @@ int mdp3_iommu_disable()
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return rc;
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}
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int mdp3_panel_get_intf_status(u32 disp_num, u32 intf_type)
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{
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int rc = 0, status = 0;
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if (intf_type != MDSS_PANEL_INTF_DSI)
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return 0;
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mdp3_clk_update(MDP3_CLK_AHB, 1);
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mdp3_clk_update(MDP3_CLK_AXI, 1);
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mdp3_clk_update(MDP3_CLK_MDP_CORE, 1);
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status = (MDP3_REG_READ(MDP3_REG_DMA_P_CONFIG) & 0x180000);
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/* DSI video mode or command mode */
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rc = (status == 0x180000) || (status == 0x080000);
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mdp3_clk_update(MDP3_CLK_AHB, 0);
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mdp3_clk_update(MDP3_CLK_AXI, 0);
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mdp3_clk_update(MDP3_CLK_MDP_CORE, 0);
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return rc;
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}
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int mdp3_iommu_ctrl(int enable)
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{
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int rc;
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@ -2026,6 +2048,7 @@ static int mdp3_probe(struct platform_device *pdev)
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mdp3_res->mdss_util->iommu_ctrl = mdp3_iommu_ctrl;
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mdp3_res->mdss_util->bus_scale_set_quota = mdp3_bus_scale_set_quota;
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mdp3_res->mdss_util->panel_intf_type = mdp3_panel_intf_type;
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mdp3_res->mdss_util->panel_intf_status = mdp3_panel_get_intf_status;
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rc = mdp3_parse_dt(pdev);
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if (rc)
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@ -481,6 +481,7 @@ struct mdss_util_intf {
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int (*iommu_ctrl)(int enable);
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void (*bus_bandwidth_ctrl)(int enable);
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int (*bus_scale_set_quota)(int client, u64 ab_quota, u64 ib_quota);
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int (*panel_intf_status)(u32 disp_num, u32 intf_type);
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struct mdss_panel_cfg* (*panel_intf_type)(int intf_val);
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};
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@ -2288,7 +2288,6 @@ static struct device_node *mdss_dsi_config_panel(struct platform_device *pdev)
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struct mdss_dsi_ctrl_pdata *ctrl_pdata = platform_get_drvdata(pdev);
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char panel_cfg[MDSS_MAX_PANEL_LEN];
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struct device_node *dsi_pan_node = NULL;
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bool cmd_cfg_cont_splash = true;
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int rc = 0;
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if (!ctrl_pdata) {
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@ -2311,9 +2310,7 @@ static struct device_node *mdss_dsi_config_panel(struct platform_device *pdev)
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return NULL;
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}
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cmd_cfg_cont_splash = mdss_panel_get_boot_cfg() ? true : false;
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rc = mdss_dsi_panel_init(dsi_pan_node, ctrl_pdata, cmd_cfg_cont_splash);
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rc = mdss_dsi_panel_init(dsi_pan_node, ctrl_pdata);
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if (rc) {
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pr_err("%s: dsi panel init failed\n", __func__);
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of_node_put(dsi_pan_node);
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@ -3453,6 +3450,12 @@ int dsi_panel_device_register(struct platform_device *ctrl_pdev,
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}
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}
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pinfo->cont_splash_enabled =
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ctrl_pdata->mdss_util->panel_intf_status(pinfo->pdest,
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MDSS_PANEL_INTF_DSI) ? true : false;
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pr_info("%s: Continuous splash %s\n", __func__,
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pinfo->cont_splash_enabled ? "enabled" : "disabled");
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rc = mdss_register_panel(ctrl_pdev, &(ctrl_pdata->panel_data));
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if (rc) {
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@ -598,8 +598,7 @@ void mdss_dsi_get_hw_revision(struct mdss_dsi_ctrl_pdata *ctrl);
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u32 mdss_dsi_panel_cmd_read(struct mdss_dsi_ctrl_pdata *ctrl, char cmd0,
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char cmd1, void (*fxn)(int), char *rbuf, int len);
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int mdss_dsi_panel_init(struct device_node *node,
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struct mdss_dsi_ctrl_pdata *ctrl_pdata,
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bool cmd_cfg_cont_splash);
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struct mdss_dsi_ctrl_pdata *ctrl_pdata);
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int mdss_dsi_panel_timing_switch(struct mdss_dsi_ctrl_pdata *ctrl_pdata,
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struct mdss_panel_timing *timing);
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@ -1817,9 +1817,6 @@ static int mdss_dsi_parse_panel_features(struct device_node *np,
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pinfo = &ctrl->panel_data.panel_info;
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pinfo->cont_splash_enabled = of_property_read_bool(np,
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"qcom,cont-splash-enabled");
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pinfo->partial_update_supported = of_property_read_bool(np,
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"qcom,partial-update-enabled");
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if (pinfo->mipi.mode == DSI_CMD_MODE) {
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@ -2530,8 +2527,7 @@ error:
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}
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int mdss_dsi_panel_init(struct device_node *node,
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struct mdss_dsi_ctrl_pdata *ctrl_pdata,
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bool cmd_cfg_cont_splash)
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struct mdss_dsi_ctrl_pdata *ctrl_pdata)
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{
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int rc = 0;
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static const char *panel_name;
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@ -2560,11 +2556,6 @@ int mdss_dsi_panel_init(struct device_node *node,
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return rc;
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}
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if (!cmd_cfg_cont_splash || pinfo->sim_panel_mode)
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pinfo->cont_splash_enabled = false;
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pr_info("%s: Continuous splash %s\n", __func__,
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pinfo->cont_splash_enabled ? "enabled" : "disabled");
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pinfo->dynamic_switch_pending = false;
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pinfo->is_lpm_mode = false;
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pinfo->esd_rdy = false;
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@ -1172,8 +1172,8 @@ static int mdss_edp_probe(struct platform_device *pdev)
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mdss_edp_event_setup(edp_drv);
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edp_drv->cont_splash = of_property_read_bool(pdev->dev.of_node,
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"qcom,cont-splash-enabled");
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edp_drv->cont_splash = edp_drv->mdss_util->panel_intf_status(DISPLAY_1,
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MDSS_PANEL_INTF_EDP) ? true : false;
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/* only need aux and ahb clock for aux channel */
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mdss_edp_prepare_aux_clocks(edp_drv);
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@ -4641,7 +4641,6 @@ static int hdmi_tx_get_dt_data(struct platform_device *pdev,
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int i, rc = 0;
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struct device_node *of_node = NULL;
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struct hdmi_tx_ctrl *hdmi_ctrl = platform_get_drvdata(pdev);
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bool splash_en;
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if (!pdev || !pdata) {
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DEV_ERR("%s: invalid input\n", __func__);
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@ -4698,12 +4697,10 @@ static int hdmi_tx_get_dt_data(struct platform_device *pdev,
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pdata->cond_power_on = of_property_read_bool(pdev->dev.of_node,
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"qcom,conditional-power-on");
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splash_en = of_property_read_bool(pdev->dev.of_node,
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"qcom,cont-splash-enabled");
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/* cont splash screen is supported only for hdmi primary */
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pdata->cont_splash_enabled =
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hdmi_ctrl->pdata.primary ? splash_en : false;
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if (!pdata->cont_splash_enabled)
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pdata->cont_splash_enabled =
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hdmi_ctrl->mdss_util->panel_intf_status(DISPLAY_2,
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MDSS_PANEL_INTF_HDMI) ? true : false;
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return rc;
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@ -1664,6 +1664,42 @@ static int mdss_mdp_register_sysfs(struct mdss_data_type *mdata)
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return rc;
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}
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int mdss_panel_get_intf_status(u32 disp_num, u32 intf_type)
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{
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int rc, intf_status = 0;
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struct mdss_data_type *mdata = mdss_mdp_get_mdata();
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if (!mdss_res || !mdss_res->pan_cfg.init_done)
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return -EPROBE_DEFER;
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if (mdss_res->handoff_pending) {
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mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON);
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intf_status = readl_relaxed(mdata->mdp_base +
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MDSS_MDP_REG_DISP_INTF_SEL);
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mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF);
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if (intf_type == MDSS_PANEL_INTF_DSI) {
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if (disp_num == DISPLAY_1)
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rc = (intf_status & MDSS_MDP_INTF_DSI0_SEL);
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else if (disp_num == DISPLAY_2)
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rc = (intf_status & MDSS_MDP_INTF_DSI1_SEL);
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else
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rc = 0;
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} else if (intf_type == MDSS_PANEL_INTF_EDP) {
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intf_status &= MDSS_MDP_INTF_EDP_SEL;
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rc = (intf_status == MDSS_MDP_INTF_EDP_SEL);
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} else if (intf_type == MDSS_PANEL_INTF_HDMI) {
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intf_status &= MDSS_MDP_INTF_HDMI_SEL;
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rc = (intf_status == MDSS_MDP_INTF_HDMI_SEL);
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} else {
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rc = 0;
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}
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} else {
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rc = 0;
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}
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return rc;
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}
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static int mdss_mdp_probe(struct platform_device *pdev)
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{
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struct resource *res;
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@ -1708,6 +1744,7 @@ static int mdss_mdp_probe(struct platform_device *pdev)
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mdss_res->mdss_util->bus_scale_set_quota = mdss_bus_scale_set_quota;
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mdss_res->mdss_util->bus_bandwidth_ctrl = mdss_bus_bandwidth_ctrl;
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mdss_res->mdss_util->panel_intf_type = mdss_panel_intf_type;
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mdss_res->mdss_util->panel_intf_status = mdss_panel_get_intf_status;
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rc = msm_dss_ioremap_byname(pdev, &mdata->mdss_io, "mdp_phys");
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if (rc) {
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}
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EXPORT_SYMBOL(mdss_intr_line);
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int mdss_panel_get_boot_cfg(void)
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{
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int rc;
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if (!mdss_res || !mdss_res->pan_cfg.init_done)
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return -EPROBE_DEFER;
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if (mdss_res->handoff_pending)
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rc = 1;
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else
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rc = 0;
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return rc;
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}
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int mdss_mdp_wait_for_xin_halt(u32 xin_id, bool is_vbif_nrt)
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{
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void __iomem *vbif_base;
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@ -290,6 +290,11 @@ enum mdss_mdp_sspp_chroma_samp_type {
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#define MDSS_MDP_NUM_WB_MIXERS 2
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#define MDSS_MDP_CTL_X_LAYER_5 0x24
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#define MDSS_MDP_INTF_EDP_SEL (BIT(3) | BIT(1))
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#define MDSS_MDP_INTF_HDMI_SEL (BIT(25) | BIT(24))
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#define MDSS_MDP_INTF_DSI0_SEL BIT(8)
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#define MDSS_MDP_INTF_DSI1_SEL BIT(16)
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enum mdss_mdp_mixer_intf_index {
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MDSS_MDP_INTF_LAYERMIXER0,
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MDSS_MDP_INTF_LAYERMIXER1,
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@ -880,16 +880,6 @@ static inline bool mdss_panel_is_power_on_ulp(int panel_power_state)
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*/
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struct mdss_panel_cfg *mdss_panel_intf_type(int intf_val);
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/**
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* mdss_panel_get_boot_cfg() - checks if bootloader config present
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*
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* Function returns true if bootloader has configured the parameters
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* for primary controller and panel config data.
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*
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* returns true if bootloader configured, else false
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*/
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int mdss_panel_get_boot_cfg(void);
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/**
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* mdss_is_ready() - checks if mdss is probed and ready
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*
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@ -151,6 +151,7 @@ struct mdss_util_intf mdss_util = {
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.bus_bandwidth_ctrl = NULL,
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.bus_scale_set_quota = NULL,
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.panel_intf_type = NULL,
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.panel_intf_status = NULL,
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.mdp_probe_done = false
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};
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