From b5bcae491ae5998466ebfc8d41ffe165b4a4b08c Mon Sep 17 00:00:00 2001 From: Prasad Sodagudi Date: Thu, 19 Nov 2015 15:19:46 +0530 Subject: [PATCH] perf: Change PMCR write to read-modify-write Preserves the bitfields of PMCR(AArch32)/PMCR_EL0(AArch64) during PMU reset. Reset routine should write a 1 to PMCR.C and PMCR.P fields only to reset the counters. Other fields should not be changed as they could be set before PMU initialization and their value must be preserved even after reset. Change-Id: I835bf41f89a8a4691e996e6766aed4b4c8ef4368 Acked-by: Abhiroop Basak Signed-off-by: Prasad Sodagudi --- arch/arm/kernel/perf_event_v7.c | 2 +- arch/arm64/kernel/perf_event.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/kernel/perf_event_v7.c b/arch/arm/kernel/perf_event_v7.c index 126dc679b230..5350d91acef5 100644 --- a/arch/arm/kernel/perf_event_v7.c +++ b/arch/arm/kernel/perf_event_v7.c @@ -991,7 +991,7 @@ static void armv7pmu_reset(void *info) } /* Initialize & Reset PMNC: C and P bits */ - armv7_pmnc_write(ARMV7_PMNC_P | ARMV7_PMNC_C); + armv7_pmnc_write(armv7_pmnc_read() | ARMV7_PMNC_P | ARMV7_PMNC_C); } static int armv7_a8_map_event(struct perf_event *event) diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c index 5b1897e8ca24..c7491471b04d 100644 --- a/arch/arm64/kernel/perf_event.c +++ b/arch/arm64/kernel/perf_event.c @@ -573,7 +573,7 @@ static void armv8pmu_reset(void *info) } /* Initialize & Reset PMNC: C and P bits. */ - armv8pmu_pmcr_write(ARMV8_PMCR_P | ARMV8_PMCR_C); + armv8pmu_pmcr_write(armv8pmu_pmcr_read() | ARMV8_PMCR_P | ARMV8_PMCR_C); /* Disable access from userspace. */ asm volatile("msr pmuserenr_el0, %0" :: "r" (0));