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drm/i915/skl: Adjust intel_fb_align_height() for Yb/Yf tiling

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We now need the bpp of the fb as Yf tiling has different tile widths
depending on it.

v2: Rebased for the new addfb2 interface. (Tvrtko Ursulin)
v3: Rebased for fb modifier changes. (Tvrtko Ursulin)
v4: Added missing case and 128-bit pixel warning. (Damien Lespiau)

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> (v3)
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Damien Lespiau 2015-02-27 11:15:19 +00:00 • committed by Daniel Vetter
parent b321803dfb
commit b5d0e9bfa6
1 changed files with 37 additions and 2 deletions
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39
drivers/gpu/drm/i915/intel_display.c
View file

@ -2195,9 +2195,44 @@ intel_fb_align_height(struct drm_device *dev, int height,
uint64_t fb_format_modifier) uint64_t fb_format_modifier)
{ {
int tile_height; int tile_height;
uint32_t bits_per_pixel;
tile_height = fb_format_modifier == I915_FORMAT_MOD_X_TILED ? switch (fb_format_modifier) {
(IS_GEN2(dev) ? 16 : 8) : 1; case DRM_FORMAT_MOD_NONE:
tile_height = 1;
break;
case I915_FORMAT_MOD_X_TILED:
tile_height = IS_GEN2(dev) ? 16 : 8;
break;
case I915_FORMAT_MOD_Y_TILED:
tile_height = 32;
break;
case I915_FORMAT_MOD_Yf_TILED:
bits_per_pixel = drm_format_plane_cpp(pixel_format, 0) * 8;
switch (bits_per_pixel) {
default:
case 8:
tile_height = 64;
break;
case 16:
case 32:
tile_height = 32;
break;
case 64:
tile_height = 16;
break;
case 128:
WARN_ONCE(1,
"128-bit pixels are not supported for display!");
tile_height = 16;
break;
}
break;
default:
MISSING_CASE(fb_format_modifier);
tile_height = 1;
break;
}
return ALIGN(height, tile_height); return ALIGN(height, tile_height);
} }