diff --git a/arch/arm/boot/dts/qcom/sdm660-camera.dtsi b/arch/arm/boot/dts/qcom/sdm660-camera.dtsi index e6bd0c06e444..14b009656890 100644 --- a/arch/arm/boot/dts/qcom/sdm660-camera.dtsi +++ b/arch/arm/boot/dts/qcom/sdm660-camera.dtsi @@ -392,6 +392,7 @@ <106 512 0 0>, <106 512 0 0>; qcom,msm-bus-vector-dyn-vote; + qcom,cpp-cx-ipeak = <&cx_ipeak_lm 2>; resets = <&clock_mmss CAMSS_MICRO_BCR>; reset-names = "micro_iface_reset"; qcom,src-clock-rates = <120000000 256000000 384000000 @@ -577,6 +578,7 @@ <29 512 0 0>, <29 512 100000000 100000000>; qcom,msm-bus-vector-dyn-vote; + qcom,vfe-cx-ipeak = <&cx_ipeak_lm 2>; }; vfe1: qcom,vfe1@ca14000 { @@ -657,6 +659,7 @@ <29 512 0 0>, <29 512 100000000 100000000>; qcom,msm-bus-vector-dyn-vote; + qcom,vfe-cx-ipeak = <&cx_ipeak_lm 2>; }; qcom,vfe { diff --git a/arch/arm/boot/dts/qcom/sdm660-gpu.dtsi b/arch/arm/boot/dts/qcom/sdm660-gpu.dtsi index a47a788874fa..f5d61d440a27 100644 --- a/arch/arm/boot/dts/qcom/sdm660-gpu.dtsi +++ b/arch/arm/boot/dts/qcom/sdm660-gpu.dtsi @@ -118,6 +118,10 @@ vddcx-supply = <&gdsc_gpu_cx>; vdd-supply = <&gdsc_gpu_gx>; + /* Cx ipeak limit supprt */ + qcom,gpu-cx-ipeak = <&cx_ipeak_lm 1>; + qcom,gpu-cx-ipeak-clk = <700000000>; + /* CPU latency parameter */ qcom,pm-qos-active-latency = <518>; qcom,pm-qos-wakeup-latency = <518>; diff --git a/arch/arm/boot/dts/qcom/sdm660-mdss.dtsi b/arch/arm/boot/dts/qcom/sdm660-mdss.dtsi index 6e32c1282d3e..4794e648752b 100644 --- a/arch/arm/boot/dts/qcom/sdm660-mdss.dtsi +++ b/arch/arm/boot/dts/qcom/sdm660-mdss.dtsi @@ -50,6 +50,7 @@ qcom,vbif-settings = <0x00ac 0x00008040>, <0x00d0 0x00002828>; + qcom,mdss-cx-ipeak = <&cx_ipeak_lm 3>; qcom,mdss-has-panic-ctrl; qcom,mdss-per-pipe-panic-luts = <0x000f>, <0xffff>, diff --git a/arch/arm/boot/dts/qcom/sdm660.dtsi b/arch/arm/boot/dts/qcom/sdm660.dtsi index 1767e811a826..242913ebc5d3 100644 --- a/arch/arm/boot/dts/qcom/sdm660.dtsi +++ b/arch/arm/boot/dts/qcom/sdm660.dtsi @@ -818,6 +818,11 @@ }; }; + cx_ipeak_lm: cx_ipeak@1fe5040 { + compatible = "qcom,cx-ipeak-sdm660"; + reg = <0x1fe5040 0x28>; + }; + qcom,bcl { compatible = "qcom,bcl"; qcom,bcl-enable; @@ -2520,6 +2525,11 @@ }; }; +&msm_vidc { + qcom,cx-ipeak-data = <&cx_ipeak_lm 4>; + qcom,clock-freq-threshold = <518400000>; +}; + &soc { gpio_keys { status = "okay";