evie/android_kernel_oneplus_msm8998
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msm: kgsl: remove GFX retention support

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GFX retention mode does not save GFX rail power. The feature
increased MX rail power. Fixing the problem requires more overhead
than removing it. The feature has never been enabled in any targets.
So remove the feature.

CRs-Fixed: 1053516
Change-Id: I5f118138eca307f7cc16405ff9c8897ecd510c12
Signed-off-by: George Shen <sqiao@codeaurora.org>
This commit is contained in:
George Shen 2016-08-11 14:00:09 -07:00
parent c605e110ab
commit bac30ab032
4 changed files with 0 additions and 102 deletions
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1
Documentation/devicetree/bindings/gpu/adreno.txt
View file

@ -96,7 +96,6 @@ Optional Properties:
the chip identification read from the GPU hardware.
This is used to override faulty hardware readings.
- qcom,strtstp-sleepwake: Boolean. Enables use of GPU SLUMBER instead of SLEEP for power savings
- qcom,gx-retention: Boolean. Enables use of GX rail RETENTION voltage
- qcom,disable-busy-time-burst:
Boolean. Disables the busy time burst to avoid switching
of power level for large frames based on the busy time limit.

92
drivers/gpu/msm/kgsl_pwrctrl.c
View file

@ -31,7 +31,6 @@
#define KGSL_PWRFLAGS_CLK_ON 1
#define KGSL_PWRFLAGS_AXI_ON 2
#define KGSL_PWRFLAGS_IRQ_ON 3
#define KGSL_PWRFLAGS_RETENTION_ON 4
#define KGSL_PWRFLAGS_NAP_OFF 5
#define UPDATE_BUSY_VAL 1000000
@ -80,10 +79,8 @@ static void kgsl_pwrctrl_set_state(struct kgsl_device *device,
unsigned int state);
static void kgsl_pwrctrl_request_state(struct kgsl_device *device,
unsigned int state);
static void kgsl_pwrctrl_retention_clk(struct kgsl_device *device, int state);
static int _isense_clk_set_rate(struct kgsl_pwrctrl *pwr, int level);
/**
* _record_pwrevent() - Record the history of the new event
* @device: Pointer to the kgsl_device struct
@ -985,9 +982,6 @@ static void __force_on(struct kgsl_device *device, int flag, int on)
case KGSL_PWRFLAGS_POWER_ON:
kgsl_pwrctrl_pwrrail(device, KGSL_PWRFLAGS_ON);
break;
case KGSL_PWRFLAGS_RETENTION_ON:
kgsl_pwrctrl_retention_clk(device, KGSL_PWRFLAGS_ON);
break;
}
set_bit(flag, &device->pwrctrl.ctrl_flags);
} else {
@ -1071,21 +1065,6 @@ static ssize_t kgsl_pwrctrl_force_rail_on_store(struct device *dev,
return __force_on_store(dev, attr, buf, count, KGSL_PWRFLAGS_POWER_ON);
}
static ssize_t kgsl_pwrctrl_force_non_retention_on_show(struct device *dev,
struct device_attribute *attr,
char *buf)
{
return __force_on_show(dev, attr, buf, KGSL_PWRFLAGS_RETENTION_ON);
}
static ssize_t kgsl_pwrctrl_force_non_retention_on_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
return __force_on_store(dev, attr, buf, count,
KGSL_PWRFLAGS_RETENTION_ON);
}
static ssize_t kgsl_pwrctrl_force_no_nap_show(struct device *dev,
struct device_attribute *attr,
char *buf)
@ -1265,9 +1244,6 @@ static DEVICE_ATTR(default_pwrlevel, 0644,
kgsl_pwrctrl_default_pwrlevel_show,
kgsl_pwrctrl_default_pwrlevel_store);
static DEVICE_ATTR(popp, 0644, kgsl_popp_show, kgsl_popp_store);
static DEVICE_ATTR(force_non_retention_on, 0644,
kgsl_pwrctrl_force_non_retention_on_show,
kgsl_pwrctrl_force_non_retention_on_store);
static DEVICE_ATTR(force_no_nap, 0644,
kgsl_pwrctrl_force_no_nap_show,
kgsl_pwrctrl_force_no_nap_store);
@ -1289,7 +1265,6 @@ static const struct device_attribute *pwrctrl_attr_list[] = {
&dev_attr_force_clk_on,
&dev_attr_force_bus_on,
&dev_attr_force_rail_on,
&dev_attr_force_non_retention_on,
&dev_attr_force_no_nap,
&dev_attr_bus_split,
&dev_attr_default_pwrlevel,
@ -1328,54 +1303,6 @@ void kgsl_pwrctrl_busy_time(struct kgsl_device *device, u64 time, u64 busy)
}
EXPORT_SYMBOL(kgsl_pwrctrl_busy_time);
static void kgsl_pwrctrl_retention_clk(struct kgsl_device *device, int state)
{
struct kgsl_pwrctrl *pwr = &device->pwrctrl;
int i = 0;
if (!(pwr->gx_retention) || test_bit(KGSL_PWRFLAGS_RETENTION_ON,
&device->pwrctrl.ctrl_flags))
return;
if (state == KGSL_PWRFLAGS_OFF) {
if (test_and_clear_bit(KGSL_PWRFLAGS_RETENTION_ON,
&pwr->power_flags)) {
trace_kgsl_retention_clk(device, state);
/* prepare the mx clk to avoid RPM transactions*/
clk_set_rate(pwr->dummy_mx_clk,
pwr->pwrlevels
[pwr->active_pwrlevel].
gpu_freq);
clk_prepare(pwr->dummy_mx_clk);
/*
* Unprepare Gfx clocks to put Gfx rail to
* retention voltage.
*/
for (i = KGSL_MAX_CLKS - 1; i > 0; i--)
if (pwr->grp_clks[i])
clk_unprepare(pwr->grp_clks[i]);
}
} else if (state == KGSL_PWRFLAGS_ON) {
if (!test_and_set_bit(KGSL_PWRFLAGS_RETENTION_ON,
&pwr->power_flags)) {
trace_kgsl_retention_clk(device, state);
/*
* Prepare Gfx clocks to put Gfx rail out
* of rentention
*/
for (i = KGSL_MAX_CLKS - 1; i > 0; i--)
if (pwr->grp_clks[i])
clk_prepare(pwr->grp_clks[i]);
/* unprepare the dummy mx clk*/
clk_unprepare(pwr->dummy_mx_clk);
clk_set_rate(pwr->dummy_mx_clk,
pwr->pwrlevels[pwr->num_pwrlevels - 1].
gpu_freq);
}
}
}
static void kgsl_pwrctrl_clk(struct kgsl_device *device, int state,
int requested_state)
{
@ -1820,16 +1747,6 @@ int kgsl_pwrctrl_init(struct kgsl_device *device)
result = 20;
pwr->deep_nap_timeout = msecs_to_jiffies(result);
pwr->gx_retention = of_property_read_bool(pdev->dev.of_node,
"qcom,gx-retention");
if (pwr->gx_retention) {
pwr->dummy_mx_clk = clk_get(&pdev->dev, "mx_clk");
if (IS_ERR(pwr->dummy_mx_clk)) {
pwr->gx_retention = 0;
pwr->dummy_mx_clk = NULL;
KGSL_CORE_ERR("Couldn't get clock: mx_clk\n");
}
}
/* Getting gfx-bimc-interface-clk frequency */
if (!of_property_read_u32(pdev->dev.of_node,
@ -1838,8 +1755,6 @@ int kgsl_pwrctrl_init(struct kgsl_device *device)
pwr->gpu_bimc_int_clk = devm_clk_get(&pdev->dev,
"bimc_gpu_clk");
pwr->power_flags = BIT(KGSL_PWRFLAGS_RETENTION_ON);
if (of_property_read_bool(pdev->dev.of_node, "qcom,no-nap"))
device->pwrctrl.ctrl_flags |= BIT(KGSL_PWRFLAGS_NAP_OFF);
@ -2154,8 +2069,6 @@ static int _init(struct kgsl_device *device)
case KGSL_STATE_DEEP_NAP:
pm_qos_update_request(&device->pwrctrl.pm_qos_req_dma,
device->pwrctrl.pm_qos_active_latency);
/* Get the device out of retention */
kgsl_pwrctrl_retention_clk(device, KGSL_PWRFLAGS_ON);
/* fall through */
case KGSL_STATE_NAP:
case KGSL_STATE_SLEEP:
@ -2213,8 +2126,6 @@ static int _wake(struct kgsl_device *device)
case KGSL_STATE_DEEP_NAP:
pm_qos_update_request(&device->pwrctrl.pm_qos_req_dma,
device->pwrctrl.pm_qos_active_latency);
/* Get the device out of retention */
kgsl_pwrctrl_retention_clk(device, KGSL_PWRFLAGS_ON);
/* fall through */
case KGSL_STATE_NAP:
/* Turn on the core clocks */
@ -2344,7 +2255,6 @@ _deep_nap(struct kgsl_device *device)
* a deeper low power state. No other transition is permitted
*/
case KGSL_STATE_NAP:
kgsl_pwrctrl_retention_clk(device, KGSL_PWRFLAGS_OFF);
pm_qos_update_request(&device->pwrctrl.pm_qos_req_dma,
PM_QOS_DEFAULT_VALUE);
kgsl_pwrctrl_set_state(device, KGSL_STATE_DEEP_NAP);
@ -2413,8 +2323,6 @@ _slumber(struct kgsl_device *device)
}
del_timer_sync(&device->pwrctrl.deep_nap_timer);
kgsl_pwrctrl_irq(device, KGSL_PWRFLAGS_OFF);
/* Get the device out of retention */
kgsl_pwrctrl_retention_clk(device, KGSL_PWRFLAGS_ON);
/* make sure power is on to stop the device*/
status = kgsl_pwrctrl_enable(device);
device->ftbl->suspend_context(device);

4
drivers/gpu/msm/kgsl_pwrctrl.h
View file

@ -111,7 +111,6 @@ struct kgsl_regulator {
* struct kgsl_pwrctrl - Power control settings for a KGSL device
* @interrupt_num - The interrupt number for the device
* @grp_clks - Array of clocks structures that we control
* @dummy_mx_clk - mx clock that is contolled during retention
* @power_flags - Control flags for power
* @pwrlevels - List of supported power levels
* @active_pwrlevel - The currently active power level
@ -155,7 +154,6 @@ struct kgsl_regulator {
* @sysfs_pwr_limit - pointer to the sysfs limits node
* @deep_nap_timer - Timer struct for entering deep nap
* @deep_nap_timeout - Timeout for entering deep nap
* @gx_retention - true if retention voltage is allowed
* isense_clk_indx - index of isense clock, 0 if no isense
* isense_clk_on_level - isense clock rate is XO rate below this level.
*/
@ -163,7 +161,6 @@ struct kgsl_regulator {
struct kgsl_pwrctrl {
int interrupt_num;
struct clk *grp_clks[KGSL_MAX_CLKS];
struct clk *dummy_mx_clk;
struct clk *gpu_bimc_int_clk;
int isense_clk_indx;
int isense_clk_on_level;
@ -212,7 +209,6 @@ struct kgsl_pwrctrl {
struct kgsl_pwr_limit *sysfs_pwr_limit;
struct timer_list deep_nap_timer;
uint32_t deep_nap_timeout;
bool gx_retention;
unsigned int gpu_bimc_int_clk_freq;
bool gpu_bimc_interface_enabled;
};

5
drivers/gpu/msm/kgsl_trace.h
View file

@ -221,11 +221,6 @@ DEFINE_EVENT(kgsl_pwr_template, kgsl_rail,
TP_ARGS(device, on)
);
DEFINE_EVENT(kgsl_pwr_template, kgsl_retention_clk,
TP_PROTO(struct kgsl_device *device, int on),
TP_ARGS(device, on)
);
TRACE_EVENT(kgsl_clk,
TP_PROTO(struct kgsl_device *device, unsigned int on,