e1000e: workaround link issues on busy hub in half duplex on 82577/82578
This patch removes a delay in hardware after every received packet allowing more time for transmitted packets to go out in between received packets in half duplex. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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1 changed files with 18 additions and 1 deletions
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@ -1122,6 +1122,7 @@ static s32 e1000_set_mdio_slow_mode_hv(struct e1000_hw *hw)
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static s32 e1000_hv_phy_workarounds_ich8lan(struct e1000_hw *hw)
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{
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s32 ret_val = 0;
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u16 phy_data;
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if (hw->mac.type != e1000_pchlan)
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return ret_val;
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@ -1165,16 +1166,32 @@ static s32 e1000_hv_phy_workarounds_ich8lan(struct e1000_hw *hw)
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hw->phy.addr = 1;
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ret_val = e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT, 0);
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hw->phy.ops.release(hw);
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if (ret_val)
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goto out;
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hw->phy.ops.release(hw);
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/*
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* Configure the K1 Si workaround during phy reset assuming there is
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* link so that it disables K1 if link is in 1Gbps.
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*/
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ret_val = e1000_k1_gig_workaround_hv(hw, true);
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if (ret_val)
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goto out;
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/* Workaround for link disconnects on a busy hub in half duplex */
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ret_val = hw->phy.ops.acquire(hw);
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if (ret_val)
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goto out;
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ret_val = hw->phy.ops.read_reg_locked(hw,
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PHY_REG(BM_PORT_CTRL_PAGE, 17),
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&phy_data);
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if (ret_val)
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goto release;
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ret_val = hw->phy.ops.write_reg_locked(hw,
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PHY_REG(BM_PORT_CTRL_PAGE, 17),
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phy_data & 0x00FF);
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release:
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hw->phy.ops.release(hw);
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out:
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return ret_val;
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}
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