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FROMLIST: arm64: Factor out TTBR0_EL1 post-update workaround into a specific asm macro

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This patch takes the errata workaround code out of cpu_do_switch_mm into
a dedicated post_ttbr0_update_workaround macro which will be reused in a
subsequent patch.

Cc: Will Deacon <will.deacon@arm.com>
Cc: James Morse <james.morse@arm.com>
Cc: Kees Cook <keescook@chromium.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

Change-Id: I69f94e4c41046bd52ca9340b72d97bfcf955b586
(cherry picked from commit 4398e6a1644373a4c2f535f4153c8378d0914630)
Signed-off-by: Sami Tolvanen <samitolvanen@google.com>
This commit is contained in:
Catalin Marinas 2016-07-01 15:48:55 +01:00 • committed by Amit Pundir
parent 8ea0a504d9
commit bb8653ae4b
2 changed files with 18 additions and 10 deletions
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17
arch/arm64/include/asm/assembler.h
View file

@ -362,4 +362,21 @@ alternative_endif
movk \reg, :abs_g0_nc:\val
.endm
/*
* Errata workaround post TTBR0_EL1 update.
*/
.macro post_ttbr0_update_workaround
#ifdef CONFIG_CAVIUM_ERRATUM_27456
alternative_if_not ARM64_WORKAROUND_CAVIUM_27456
nop
nop
nop
alternative_else
ic iallu
dsb nsh
isb
alternative_endif
#endif
.endm
#endif /* __ASM_ASSEMBLER_H */

11
arch/arm64/mm/proc.S
View file

@ -136,17 +136,8 @@ ENTRY(cpu_do_switch_mm)
bfi x0, x1, #48, #16 // set the ASID
msr ttbr0_el1, x0 // set TTBR0
isb
alternative_if_not ARM64_WORKAROUND_CAVIUM_27456
post_ttbr0_update_workaround
ret
nop
nop
nop
alternative_else
ic iallu
dsb nsh
isb
ret
alternative_endif
ENDPROC(cpu_do_switch_mm)
.pushsection ".idmap.text", "ax"