iommu/vt-d: dmar_fault should only clear PPF/PFO field.
When there is a dmar irq, dmar_fault is called and all of the fields in FSTS are cleared. But ICE/IQE/ITE should not be cleared here, they need to be processed and cleared in function qi_check_fault. [Minor cleanup by Joerg Roedel] Signed-off-by: Li, Zhen-Hua <zhen-hual@hp.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
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1 changed files with 7 additions and 5 deletions
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@ -1204,7 +1204,7 @@ irqreturn_t dmar_fault(int irq, void *dev_id)
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/* TBD: ignore advanced fault log currently */
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/* TBD: ignore advanced fault log currently */
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if (!(fault_status & DMA_FSTS_PPF))
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if (!(fault_status & DMA_FSTS_PPF))
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goto clear_rest;
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goto unlock_exit;
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fault_index = dma_fsts_fault_record_index(fault_status);
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fault_index = dma_fsts_fault_record_index(fault_status);
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reg = cap_fault_reg_offset(iommu->cap);
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reg = cap_fault_reg_offset(iommu->cap);
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@ -1245,11 +1245,10 @@ irqreturn_t dmar_fault(int irq, void *dev_id)
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fault_index = 0;
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fault_index = 0;
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raw_spin_lock_irqsave(&iommu->register_lock, flag);
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raw_spin_lock_irqsave(&iommu->register_lock, flag);
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}
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}
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clear_rest:
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/* clear all the other faults */
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fault_status = readl(iommu->reg + DMAR_FSTS_REG);
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writel(fault_status, iommu->reg + DMAR_FSTS_REG);
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writel(DMA_FSTS_PFO | DMA_FSTS_PPF, iommu->reg + DMAR_FSTS_REG);
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unlock_exit:
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raw_spin_unlock_irqrestore(&iommu->register_lock, flag);
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raw_spin_unlock_irqrestore(&iommu->register_lock, flag);
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return IRQ_HANDLED;
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return IRQ_HANDLED;
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}
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}
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@ -1297,6 +1296,7 @@ int __init enable_drhd_fault_handling(void)
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for_each_drhd_unit(drhd) {
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for_each_drhd_unit(drhd) {
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int ret;
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int ret;
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struct intel_iommu *iommu = drhd->iommu;
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struct intel_iommu *iommu = drhd->iommu;
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u32 fault_status;
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ret = dmar_set_interrupt(iommu);
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ret = dmar_set_interrupt(iommu);
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if (ret) {
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if (ret) {
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@ -1309,6 +1309,8 @@ int __init enable_drhd_fault_handling(void)
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* Clear any previous faults.
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* Clear any previous faults.
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*/
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*/
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dmar_fault(iommu->irq, iommu);
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dmar_fault(iommu->irq, iommu);
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fault_status = readl(iommu->reg + DMAR_FSTS_REG);
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writel(fault_status, iommu->reg + DMAR_FSTS_REG);
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}
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}
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return 0;
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return 0;
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