nvme/quirk: Add a delay before checking for adapter readiness
commit 54adc01055b75ec8769c5a36574c7a0895c0c0b2 upstream. When disabling the controller, the specification says the register NVME_REG_CC should be written and then driver needs to wait the adapter to be ready, which is checked by reading another register bit (NVME_CSTS_RDY). There's a timeout validation in this checking, so in case this timeout is reached the driver gives up and removes the adapter from the system. After a firmware activation procedure, the PCI_DEVICE(0x1c58, 0x0003) (HGST adapter) end up being removed if we issue a reset_controller, because driver keeps verifying the NVME_REG_CSTS until the timeout is reached. This patch adds a necessary quirk for this adapter, by introducing a delay before nvme_wait_ready(), so the reset procedure is able to be completed. This quirk is needed because just increasing the timeout is not enough in case of this adapter - the driver must wait before start reading NVME_REG_CSTS register on this specific device. Signed-off-by: Guilherme G. Piccoli <gpiccoli@linux.vnet.ibm.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Jens Axboe <axboe@fb.com> [mauricfo: backport to v4.4.70 without nvme quirk handling & nvme_ctrl] Signed-off-by: Mauricio Faria de Oliveira <mauricfo@linux.vnet.ibm.com> Tested-by: Narasimhan Vaidyanathan <vnarasimhan@in.ibm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -27,6 +27,13 @@ enum {
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NVME_NS_LIGHTNVM = 1,
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};
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/* The below value is the specific amount of delay needed before checking
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* readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the
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* NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was
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* found empirically.
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*/
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#define NVME_QUIRK_DELAY_AMOUNT 2000
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/*
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* Represents an NVM Express device. Each nvme_dev is a PCI function.
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*/
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@ -1633,10 +1633,20 @@ static int nvme_wait_ready(struct nvme_dev *dev, u64 cap, bool enabled)
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*/
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static int nvme_disable_ctrl(struct nvme_dev *dev, u64 cap)
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{
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struct pci_dev *pdev = to_pci_dev(dev->dev);
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dev->ctrl_config &= ~NVME_CC_SHN_MASK;
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dev->ctrl_config &= ~NVME_CC_ENABLE;
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writel(dev->ctrl_config, &dev->bar->cc);
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/* Checking for dev->tagset is a trick to avoid sleeping on module
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* load, since we only need the quirk on reset_controller. Notice
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* that the HGST device needs this delay only in firmware activation
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* procedure; unfortunately we have no (easy) way to verify this.
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*/
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if (pdev->vendor == 0x1c58 && pdev->device == 0x0003 && dev->tagset)
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msleep(NVME_QUIRK_DELAY_AMOUNT);
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return nvme_wait_ready(dev, cap, false);
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}
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