From bea7e760934ff79d9ad194758a29b57e16da37fb Mon Sep 17 00:00:00 2001 From: Taniya Das Date: Mon, 20 Feb 2017 17:19:51 +0530 Subject: [PATCH] clk: qcom: Enable safe configuration for ahb clock source To avoid running into issues with the MMNOC RCG being enabled due to an enable request from a secure world entity whilst the HLOS code has disabled its parents, park the RCG at CXO when its disabled. Change-Id: I98e2efaed01ee4e92a457c56f2e276985882dbbb Signed-off-by: Taniya Das --- drivers/clk/qcom/mmcc-sdm660.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/qcom/mmcc-sdm660.c b/drivers/clk/qcom/mmcc-sdm660.c index b908443006af..87e6f8c6be0a 100644 --- a/drivers/clk/qcom/mmcc-sdm660.c +++ b/drivers/clk/qcom/mmcc-sdm660.c @@ -529,7 +529,7 @@ static struct clk_rcg2 ahb_clk_src = { .hid_width = 5, .parent_map = mmcc_parent_map_10, .freq_tbl = ftbl_ahb_clk_src, - .flags = FORCE_ENABLE_RCGR, + .enable_safe_config = true, .clkr.hw.init = &(struct clk_init_data){ .name = "ahb_clk_src", .parent_names = mmcc_parent_names_10,