Merge branch 'drm-fixes-3.16' of git://people.freedesktop.org/~agd5f/linux into drm-fixes
This new request drops the pageflipping fixes for now. Just a few small fixes for dpm, DP, and a fix for a hang on boot evergreen. * 'drm-fixes-3.16' of git://people.freedesktop.org/~agd5f/linux: drm/radeon/dpm: Reenabling SS on Cayman drm/radeon: fix typo in ci_stop_dpm() drm/radeon: fix typo in golden register setup on evergreen drm/radeon: only print meaningful VM faults drm/radeon/dp: return -EIO for flags not zero case
This commit is contained in:
commit
bf38b025d3
6 changed files with 18 additions and 18 deletions
|
@ -127,7 +127,7 @@ static int radeon_process_aux_ch(struct radeon_i2c_chan *chan,
|
|||
/* flags not zero */
|
||||
if (args.v1.ucReplyStatus == 2) {
|
||||
DRM_DEBUG_KMS("dp_aux_ch flags not zero\n");
|
||||
r = -EBUSY;
|
||||
r = -EIO;
|
||||
goto done;
|
||||
}
|
||||
|
||||
|
|
|
@ -1179,7 +1179,7 @@ static int ci_stop_dpm(struct radeon_device *rdev)
|
|||
tmp &= ~GLOBAL_PWRMGT_EN;
|
||||
WREG32_SMC(GENERAL_PWRMGT, tmp);
|
||||
|
||||
tmp = RREG32(SCLK_PWRMGT_CNTL);
|
||||
tmp = RREG32_SMC(SCLK_PWRMGT_CNTL);
|
||||
tmp &= ~DYNAMIC_PM_EN;
|
||||
WREG32_SMC(SCLK_PWRMGT_CNTL, tmp);
|
||||
|
||||
|
|
|
@ -7676,14 +7676,16 @@ restart_ih:
|
|||
addr = RREG32(VM_CONTEXT1_PROTECTION_FAULT_ADDR);
|
||||
status = RREG32(VM_CONTEXT1_PROTECTION_FAULT_STATUS);
|
||||
mc_client = RREG32(VM_CONTEXT1_PROTECTION_FAULT_MCCLIENT);
|
||||
/* reset addr and status */
|
||||
WREG32_P(VM_CONTEXT1_CNTL2, 1, ~1);
|
||||
if (addr == 0x0 && status == 0x0)
|
||||
break;
|
||||
dev_err(rdev->dev, "GPU fault detected: %d 0x%08x\n", src_id, src_data);
|
||||
dev_err(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_ADDR 0x%08X\n",
|
||||
addr);
|
||||
dev_err(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_STATUS 0x%08X\n",
|
||||
status);
|
||||
cik_vm_decode_fault(rdev, status, addr, mc_client);
|
||||
/* reset addr and status */
|
||||
WREG32_P(VM_CONTEXT1_CNTL2, 1, ~1);
|
||||
break;
|
||||
case 167: /* VCE */
|
||||
DRM_DEBUG("IH: VCE int: 0x%08x\n", src_data);
|
||||
|
|
|
@ -189,7 +189,7 @@ static const u32 evergreen_golden_registers[] =
|
|||
0x8c1c, 0xffffffff, 0x00001010,
|
||||
0x28350, 0xffffffff, 0x00000000,
|
||||
0xa008, 0xffffffff, 0x00010000,
|
||||
0x5cc, 0xffffffff, 0x00000001,
|
||||
0x5c4, 0xffffffff, 0x00000001,
|
||||
0x9508, 0xffffffff, 0x00000002,
|
||||
0x913c, 0x0000000f, 0x0000000a
|
||||
};
|
||||
|
@ -476,7 +476,7 @@ static const u32 cedar_golden_registers[] =
|
|||
0x8c1c, 0xffffffff, 0x00001010,
|
||||
0x28350, 0xffffffff, 0x00000000,
|
||||
0xa008, 0xffffffff, 0x00010000,
|
||||
0x5cc, 0xffffffff, 0x00000001,
|
||||
0x5c4, 0xffffffff, 0x00000001,
|
||||
0x9508, 0xffffffff, 0x00000002
|
||||
};
|
||||
|
||||
|
@ -635,7 +635,7 @@ static const u32 juniper_mgcg_init[] =
|
|||
static const u32 supersumo_golden_registers[] =
|
||||
{
|
||||
0x5eb4, 0xffffffff, 0x00000002,
|
||||
0x5cc, 0xffffffff, 0x00000001,
|
||||
0x5c4, 0xffffffff, 0x00000001,
|
||||
0x7030, 0xffffffff, 0x00000011,
|
||||
0x7c30, 0xffffffff, 0x00000011,
|
||||
0x6104, 0x01000300, 0x00000000,
|
||||
|
@ -719,7 +719,7 @@ static const u32 sumo_golden_registers[] =
|
|||
static const u32 wrestler_golden_registers[] =
|
||||
{
|
||||
0x5eb4, 0xffffffff, 0x00000002,
|
||||
0x5cc, 0xffffffff, 0x00000001,
|
||||
0x5c4, 0xffffffff, 0x00000001,
|
||||
0x7030, 0xffffffff, 0x00000011,
|
||||
0x7c30, 0xffffffff, 0x00000011,
|
||||
0x6104, 0x01000300, 0x00000000,
|
||||
|
@ -5066,14 +5066,16 @@ restart_ih:
|
|||
case 147:
|
||||
addr = RREG32(VM_CONTEXT1_PROTECTION_FAULT_ADDR);
|
||||
status = RREG32(VM_CONTEXT1_PROTECTION_FAULT_STATUS);
|
||||
/* reset addr and status */
|
||||
WREG32_P(VM_CONTEXT1_CNTL2, 1, ~1);
|
||||
if (addr == 0x0 && status == 0x0)
|
||||
break;
|
||||
dev_err(rdev->dev, "GPU fault detected: %d 0x%08x\n", src_id, src_data);
|
||||
dev_err(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_ADDR 0x%08X\n",
|
||||
addr);
|
||||
dev_err(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_STATUS 0x%08X\n",
|
||||
status);
|
||||
cayman_vm_decode_fault(rdev, status, addr);
|
||||
/* reset addr and status */
|
||||
WREG32_P(VM_CONTEXT1_CNTL2, 1, ~1);
|
||||
break;
|
||||
case 176: /* CP_INT in ring buffer */
|
||||
case 177: /* CP_INT in IB1 */
|
||||
|
|
|
@ -2329,12 +2329,6 @@ void rv770_get_engine_memory_ss(struct radeon_device *rdev)
|
|||
pi->mclk_ss = radeon_atombios_get_asic_ss_info(rdev, &ss,
|
||||
ASIC_INTERNAL_MEMORY_SS, 0);
|
||||
|
||||
/* disable ss, causes hangs on some cayman boards */
|
||||
if (rdev->family == CHIP_CAYMAN) {
|
||||
pi->sclk_ss = false;
|
||||
pi->mclk_ss = false;
|
||||
}
|
||||
|
||||
if (pi->sclk_ss || pi->mclk_ss)
|
||||
pi->dynamic_ss = true;
|
||||
else
|
||||
|
|
|
@ -6376,14 +6376,16 @@ restart_ih:
|
|||
case 147:
|
||||
addr = RREG32(VM_CONTEXT1_PROTECTION_FAULT_ADDR);
|
||||
status = RREG32(VM_CONTEXT1_PROTECTION_FAULT_STATUS);
|
||||
/* reset addr and status */
|
||||
WREG32_P(VM_CONTEXT1_CNTL2, 1, ~1);
|
||||
if (addr == 0x0 && status == 0x0)
|
||||
break;
|
||||
dev_err(rdev->dev, "GPU fault detected: %d 0x%08x\n", src_id, src_data);
|
||||
dev_err(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_ADDR 0x%08X\n",
|
||||
addr);
|
||||
dev_err(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_STATUS 0x%08X\n",
|
||||
status);
|
||||
si_vm_decode_fault(rdev, status, addr);
|
||||
/* reset addr and status */
|
||||
WREG32_P(VM_CONTEXT1_CNTL2, 1, ~1);
|
||||
break;
|
||||
case 176: /* RINGID0 CP_INT */
|
||||
radeon_fence_process(rdev, RADEON_RING_TYPE_GFX_INDEX);
|
||||
|
|
Loading…
Add table
Reference in a new issue