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ARM: dts: msm: Add cpubw device to vote for DDR bandwidth

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Add the cpubw device node with the list of supported DDR frequencies
for msm cobalt.

Change-Id: I726c1fe45e0a8a622c1ca9645a0b481cb70ca215
Signed-off-by: Rohit Gupta <rohgup@codeaurora.org>
This commit is contained in:
Rohit Gupta 2016-02-03 15:31:20 -08:00 • committed by David Keitel
parent 6b99b4c9a1
commit bf73beb9d9
1 changed files with 103 additions and 0 deletions
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103
arch/arm/boot/dts/qcom/msmcobalt.dtsi
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@ -401,6 +401,109 @@
}; };
}; };
cpubw: qcom,cpubw {
compatible = "qcom,devbw";
governor = "performance";
qcom,src-dst-ports = <1 512>;
qcom,active-only;
qcom,bw-tbl =
< 762 /* 100 MHz */ >,
< 1144 /* 150 MHz */ >,
< 1525 /* 200 MHz */ >,
< 2288 /* 300 MHz */ >,
< 3143 /* 412 MHz */ >,
< 4173 /* 547 MHz */ >,
< 5195 /* 681 MHz */ >,
< 5859 /* 768 MHz */ >,
< 7759 /* 1017 MHz */ >,
< 9887 /* 1296 MHz */ >,
< 11863 /* 1555 MHz */ >,
< 13763 /* 1804 MHz */ >;
};
mincpubw: qcom,mincpubw {
compatible = "qcom,devbw";
governor = "powersave";
qcom,src-dst-ports = <1 512>;
qcom,active-only;
qcom,bw-tbl =
< 762 /* 100 MHz */ >,
< 1144 /* 150 MHz */ >,
< 1525 /* 200 MHz */ >,
< 2288 /* 300 MHz */ >,
< 3143 /* 412 MHz */ >,
< 4173 /* 547 MHz */ >,
< 5195 /* 681 MHz */ >,
< 5859 /* 768 MHz */ >,
< 7759 /* 1017 MHz */ >,
< 9887 /* 1296 MHz */ >,
< 11863 /* 1555 MHz */ >,
< 13763 /* 1804 MHz */ >;
};
memlat_cpu0: qcom,memlat-cpu0 {
compatible = "qcom,devbw";
governor = "powersave";
qcom,src-dst-ports = <1 512>;
qcom,active-only;
qcom,bw-tbl =
< 762 /* 100 MHz */ >,
< 1144 /* 150 MHz */ >,
< 1525 /* 200 MHz */ >,
< 2288 /* 300 MHz */ >,
< 3143 /* 412 MHz */ >,
< 4173 /* 547 MHz */ >,
< 5195 /* 681 MHz */ >,
< 5859 /* 768 MHz */ >,
< 7759 /* 1017 MHz */ >,
< 9887 /* 1296 MHz */ >,
< 11863 /* 1555 MHz */ >,
< 13763 /* 1804 MHz */ >;
};
memlat_cpu4: qcom,memlat-cpu4 {
compatible = "qcom,devbw";
governor = "powersave";
qcom,src-dst-ports = <1 512>;
qcom,active-only;
qcom,bw-tbl =
< 762 /* 100 MHz */ >,
< 1144 /* 150 MHz */ >,
< 1525 /* 200 MHz */ >,
< 2288 /* 300 MHz */ >,
< 3143 /* 412 MHz */ >,
< 4173 /* 547 MHz */ >,
< 5195 /* 681 MHz */ >,
< 5859 /* 768 MHz */ >,
< 7759 /* 1017 MHz */ >,
< 9887 /* 1296 MHz */ >,
< 11863 /* 1555 MHz */ >,
< 13763 /* 1804 MHz */ >;
};
qcom,arm-memlat-mon-0 {
compatible = "qcom,arm-memlat-mon";
qcom,cpulist = <&CPU0 &CPU1 &CPU2 &CPU3>;
qcom,target-dev = <&memlat_cpu0>;
};
qcom,arm-memlat-mon-4 {
compatible = "qcom,arm-memlat-mon";
qcom,cpulist = <&CPU4 &CPU5 &CPU6 &CPU7>;
qcom,target-dev = <&memlat_cpu4>;
};
devfreq_cpufreq: devfreq-cpufreq {
mincpubw-cpufreq {
target-dev = <&mincpubw>;
cpu-to-dev-map-0 =
< 1881600 1525 >;
cpu-to-dev-map-4 =
< 2016000 1525 >,
< 2092800 5195 >;
};
};
msm_cpufreq: qcom,msm-cpufreq { msm_cpufreq: qcom,msm-cpufreq {
compatible = "qcom,msm-cpufreq"; compatible = "qcom,msm-cpufreq";
clock-names = "cpu0_clk", "cpu1_clk", "cpu2_clk", clock-names = "cpu0_clk", "cpu1_clk", "cpu2_clk",