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msm: mdss: fix mdp input/output image format definition

Browse source 
MDSS driver defines new input format for all fetch
type modes Ex: linear vs tile mode. Such redifintion
in driver is not scallable for supporting new formats
in future. This cleans up fetch mode specific definition
from MDSS driver and make it ready to accept new input/
output image formats for future targets.

Change-Id: Ia2bb6684f7eb6c06323734c9c9bbdacb788c51e0
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
This commit is contained in:
Dhaval Patel 2014-10-03 16:47:16 -07:00 • committed by David Keitel
parent 21b8e5ce48
commit bfc7796d6b
5 changed files with 106 additions and 100 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

12
drivers/video/fbdev/msm/mdss_mdp.h
View file

@ -134,6 +134,11 @@ enum mdss_mdp_panic_signal_type {
MDSS_MDP_PANIC_PER_PIPE_CFG,
};
enum mdss_mdp_fetch_type {
MDSS_MDP_FETCH_LINEAR,
MDSS_MDP_FETCH_TILE,
};
/**
* enum mdp_commit_stage_type - Indicate different commit stages
*
@ -280,7 +285,7 @@ struct mdss_mdp_format_params {
u8 unpack_count; /* 0 = 1 component, 1 = 2 component ... */
u8 bpp;
u8 alpha_enable; /* source has alpha */
u8 tile;
u8 fetch_mode;
u8 bits[MAX_PLANES];
u8 element[MAX_PLANES];
};
@ -700,6 +705,11 @@ static inline u32 left_lm_w_from_mfd(struct msm_fb_data_type *mfd)
return (ctl && ctl->mixer_left) ? ctl->mixer_left->width : 0;
}
static inline bool mdss_mdp_is_tile_format(struct mdss_mdp_format_params *fmt)
{
return fmt && (fmt->fetch_mode == MDSS_MDP_FETCH_TILE);
}
irqreturn_t mdss_mdp_isr(int irq, void *ptr);
int mdss_iommu_attach(struct mdss_data_type *mdata);
int mdss_iommu_dettach(struct mdss_data_type *mdata);

2
drivers/video/fbdev/msm/mdss_mdp_ctl.c
View file

@ -562,7 +562,7 @@ int mdss_mdp_perf_calc_pipe(struct mdss_mdp_pipe *pipe,
prefill_params.is_caf = mdss_mdp_perf_is_caf(pipe);
prefill_params.is_fbc = is_fbc;
prefill_params.is_bwc = pipe->bwc_mode;
prefill_params.is_tile = pipe->src_fmt->tile;
prefill_params.is_tile = mdss_mdp_is_tile_format(pipe->src_fmt);
prefill_params.is_hflip = pipe->flags & MDP_FLIP_LR;
prefill_params.is_cmd = !mixer->ctl->is_video_mode;
prefill_params.pnum = pipe->num;

164
drivers/video/fbdev/msm/mdss_mdp_formats.h
View file

@ -31,7 +31,7 @@ enum {
COLOR_ALPHA_4BIT = 1,
};
#define FMT_RGB_565(fmt, e0, e1, e2) \
#define FMT_RGB_565(fmt, fetch_type, e0, e1, e2) \
{ \
.format = (fmt), \
.fetch_planes = MDSS_MDP_PLANE_INTERLEAVED, \
@ -40,6 +40,7 @@ enum {
.alpha_enable = 0, \
.unpack_count = 3, \
.bpp = 2, \
.fetch_mode = (fetch_type), \
.element = { (e0), (e1), (e2) }, \
.bits = { \
[C2_R_Cr] = COLOR_5BIT, \
@ -48,26 +49,7 @@ enum {
}, \
}
#define FMT_RGB_565_TILE(fmt, e0, e1, e2) \
{ \
.format = (fmt), \
.fetch_planes = MDSS_MDP_PLANE_INTERLEAVED, \
.unpack_tight = 1, \
.unpack_align_msb = 0, \
.alpha_enable = 0, \
.unpack_count = 3, \
.bpp = 2, \
.tile = 1, \
.element = { (e0), (e1), (e2) }, \
.bits = { \
[C2_R_Cr] = COLOR_5BIT, \
[C0_G_Y] = COLOR_6BIT, \
[C1_B_Cb] = COLOR_5BIT, \
}, \
}
#define FMT_RGB_888(fmt, e0, e1, e2) \
#define FMT_RGB_888(fmt, fetch_type, e0, e1, e2) \
{ \
.format = (fmt), \
.fetch_planes = MDSS_MDP_PLANE_INTERLEAVED, \
@ -76,6 +58,7 @@ enum {
.alpha_enable = 0, \
.unpack_count = 3, \
.bpp = 3, \
.fetch_mode = (fetch_type), \
.element = { (e0), (e1), (e2) }, \
.bits = { \
[C2_R_Cr] = COLOR_8BIT, \
@ -84,7 +67,7 @@ enum {
}, \
}
#define FMT_RGB_8888(fmt, alpha_en, e0, e1, e2, e3) \
#define FMT_RGB_8888(fmt, fetch_type, alpha_en, e0, e1, e2, e3) \
{ \
.format = (fmt), \
.fetch_planes = MDSS_MDP_PLANE_INTERLEAVED, \
@ -93,25 +76,7 @@ enum {
.alpha_enable = (alpha_en), \
.unpack_count = 4, \
.bpp = 4, \
.element = { (e0), (e1), (e2), (e3) }, \
.bits = { \
[C3_ALPHA] = COLOR_8BIT, \
[C2_R_Cr] = COLOR_8BIT, \
[C0_G_Y] = COLOR_8BIT, \
[C1_B_Cb] = COLOR_8BIT, \
}, \
}
#define FMT_RGB_8888_TILE(fmt, alpha_en, e0, e1, e2, e3) \
{ \
.format = (fmt), \
.fetch_planes = MDSS_MDP_PLANE_INTERLEAVED, \
.unpack_tight = 1, \
.unpack_align_msb = 0, \
.alpha_enable = (alpha_en), \
.unpack_count = 4, \
.bpp = 4, \
.tile = 1, \
.fetch_mode = (fetch_type), \
.element = { (e0), (e1), (e2), (e3) }, \
.bits = { \
[C3_ALPHA] = COLOR_8BIT, \
@ -133,23 +98,25 @@ enum {
.unpack_tight = 1, \
.unpack_align_msb = 0
#define FMT_YUV_PSEUDO(fmt, samp, e0, e1) \
#define FMT_YUV_PSEUDO(fmt, fetch_type, samp, e0, e1) \
{ \
FMT_YUV_COMMON(fmt), \
.fetch_planes = MDSS_MDP_PLANE_PSEUDO_PLANAR, \
.chroma_sample = samp, \
.unpack_count = 2, \
.bpp = 2, \
.fetch_mode = (fetch_type), \
.element = { (e0), (e1) }, \
}
#define FMT_YUV_PLANR(fmt, samp, e0, e1) \
#define FMT_YUV_PLANR(fmt, fetch_type, samp, e0, e1) \
{ \
FMT_YUV_COMMON(fmt), \
.fetch_planes = MDSS_MDP_PLANE_PLANAR, \
.chroma_sample = samp, \
.bpp = 1, \
.unpack_count = 1, \
.fetch_mode = (fetch_type), \
.element = { (e0), (e1) } \
}
@ -163,6 +130,7 @@ enum {
.unpack_count = 4, \
.bpp = 2, \
.element = { (e0), (e1), (e2), (e3) }, \
.fetch_mode = MDSS_MDP_FETCH_LINEAR, \
.bits = { \
[C3_ALPHA] = COLOR_ALPHA_1BIT, \
[C2_R_Cr] = COLOR_5BIT, \
@ -180,6 +148,7 @@ enum {
.alpha_enable = (alpha_en), \
.unpack_count = 4, \
.bpp = 2, \
.fetch_mode = MDSS_MDP_FETCH_LINEAR, \
.element = { (e0), (e1), (e2), (e3) }, \
.bits = { \
[C3_ALPHA] = COLOR_ALPHA_4BIT, \
@ -190,50 +159,73 @@ enum {
}
static struct mdss_mdp_format_params mdss_mdp_format_map[] = {
FMT_RGB_565(MDP_RGB_565, C1_B_Cb, C0_G_Y, C2_R_Cr),
FMT_RGB_565(MDP_BGR_565, C2_R_Cr, C0_G_Y, C1_B_Cb),
FMT_RGB_565_TILE(MDP_RGB_565_TILE, C1_B_Cb, C0_G_Y, C2_R_Cr),
FMT_RGB_565_TILE(MDP_BGR_565_TILE, C2_R_Cr, C0_G_Y, C1_B_Cb),
FMT_RGB_888(MDP_RGB_888, C2_R_Cr, C0_G_Y, C1_B_Cb),
FMT_RGB_888(MDP_BGR_888, C1_B_Cb, C0_G_Y, C2_R_Cr),
FMT_RGB_565(MDP_RGB_565, MDSS_MDP_FETCH_LINEAR,
C1_B_Cb, C0_G_Y, C2_R_Cr),
FMT_RGB_565(MDP_BGR_565, MDSS_MDP_FETCH_LINEAR,
C2_R_Cr, C0_G_Y, C1_B_Cb),
FMT_RGB_565(MDP_RGB_565_TILE, MDSS_MDP_FETCH_TILE,
C1_B_Cb, C0_G_Y, C2_R_Cr),
FMT_RGB_565(MDP_BGR_565_TILE, MDSS_MDP_FETCH_TILE,
C2_R_Cr, C0_G_Y, C1_B_Cb),
FMT_RGB_888(MDP_RGB_888, MDSS_MDP_FETCH_LINEAR,
C2_R_Cr, C0_G_Y, C1_B_Cb),
FMT_RGB_888(MDP_BGR_888, MDSS_MDP_FETCH_LINEAR,
C1_B_Cb, C0_G_Y, C2_R_Cr),
FMT_RGB_8888(MDP_XRGB_8888, 0, C3_ALPHA, C2_R_Cr, C0_G_Y, C1_B_Cb),
FMT_RGB_8888(MDP_ARGB_8888, 1, C3_ALPHA, C2_R_Cr, C0_G_Y, C1_B_Cb),
FMT_RGB_8888(MDP_RGBA_8888, 1, C2_R_Cr, C0_G_Y, C1_B_Cb, C3_ALPHA),
FMT_RGB_8888(MDP_RGBX_8888, 0, C2_R_Cr, C0_G_Y, C1_B_Cb, C3_ALPHA),
FMT_RGB_8888(MDP_BGRA_8888, 1, C1_B_Cb, C0_G_Y, C2_R_Cr, C3_ALPHA),
FMT_RGB_8888(MDP_BGRX_8888, 0, C1_B_Cb, C0_G_Y, C2_R_Cr, C3_ALPHA),
FMT_RGB_8888_TILE(MDP_RGBA_8888_TILE, 1, C2_R_Cr, C0_G_Y, C1_B_Cb,
C3_ALPHA),
FMT_RGB_8888_TILE(MDP_ARGB_8888_TILE, 1, C3_ALPHA, C2_R_Cr, C0_G_Y,
C1_B_Cb),
FMT_RGB_8888_TILE(MDP_ABGR_8888_TILE, 1, C3_ALPHA, C1_B_Cb, C0_G_Y,
C2_R_Cr),
FMT_RGB_8888_TILE(MDP_BGRA_8888_TILE, 1, C1_B_Cb, C0_G_Y, C2_R_Cr,
C3_ALPHA),
FMT_RGB_8888_TILE(MDP_RGBX_8888_TILE, 0, C2_R_Cr, C0_G_Y, C1_B_Cb,
C3_ALPHA),
FMT_RGB_8888_TILE(MDP_XRGB_8888_TILE, 0, C3_ALPHA, C2_R_Cr, C0_G_Y,
C1_B_Cb),
FMT_RGB_8888_TILE(MDP_XBGR_8888_TILE, 0, C3_ALPHA, C1_B_Cb, C0_G_Y,
C2_R_Cr),
FMT_RGB_8888_TILE(MDP_BGRX_8888_TILE, 0, C1_B_Cb, C0_G_Y, C2_R_Cr,
C3_ALPHA),
FMT_RGB_8888(MDP_XRGB_8888, MDSS_MDP_FETCH_LINEAR,
0, C3_ALPHA, C2_R_Cr, C0_G_Y, C1_B_Cb),
FMT_RGB_8888(MDP_ARGB_8888, MDSS_MDP_FETCH_LINEAR,
1, C3_ALPHA, C2_R_Cr, C0_G_Y, C1_B_Cb),
FMT_RGB_8888(MDP_RGBA_8888, MDSS_MDP_FETCH_LINEAR,
1, C2_R_Cr, C0_G_Y, C1_B_Cb, C3_ALPHA),
FMT_RGB_8888(MDP_RGBX_8888, MDSS_MDP_FETCH_LINEAR,
0, C2_R_Cr, C0_G_Y, C1_B_Cb, C3_ALPHA),
FMT_RGB_8888(MDP_BGRA_8888, MDSS_MDP_FETCH_LINEAR,
1, C1_B_Cb, C0_G_Y, C2_R_Cr, C3_ALPHA),
FMT_RGB_8888(MDP_BGRX_8888, MDSS_MDP_FETCH_LINEAR,
0, C1_B_Cb, C0_G_Y, C2_R_Cr, C3_ALPHA),
FMT_RGB_8888(MDP_RGBA_8888_TILE, MDSS_MDP_FETCH_TILE,
1, C2_R_Cr, C0_G_Y, C1_B_Cb, C3_ALPHA),
FMT_RGB_8888(MDP_ARGB_8888_TILE, MDSS_MDP_FETCH_TILE,
1, C3_ALPHA, C2_R_Cr, C0_G_Y, C1_B_Cb),
FMT_RGB_8888(MDP_ABGR_8888_TILE, MDSS_MDP_FETCH_TILE,
1, C3_ALPHA, C1_B_Cb, C0_G_Y, C2_R_Cr),
FMT_RGB_8888(MDP_BGRA_8888_TILE, MDSS_MDP_FETCH_TILE,
1, C1_B_Cb, C0_G_Y, C2_R_Cr, C3_ALPHA),
FMT_RGB_8888(MDP_RGBX_8888_TILE, MDSS_MDP_FETCH_TILE,
0, C2_R_Cr, C0_G_Y, C1_B_Cb, C3_ALPHA),
FMT_RGB_8888(MDP_XRGB_8888_TILE, MDSS_MDP_FETCH_TILE,
0, C3_ALPHA, C2_R_Cr, C0_G_Y, C1_B_Cb),
FMT_RGB_8888(MDP_XBGR_8888_TILE, MDSS_MDP_FETCH_TILE,
0, C3_ALPHA, C1_B_Cb, C0_G_Y, C2_R_Cr),
FMT_RGB_8888(MDP_BGRX_8888_TILE, MDSS_MDP_FETCH_TILE,
0, C1_B_Cb, C0_G_Y, C2_R_Cr, C3_ALPHA),
FMT_YUV_PSEUDO(MDP_Y_CRCB_H1V1, MDSS_MDP_CHROMA_RGB, C2_R_Cr, C1_B_Cb),
FMT_YUV_PSEUDO(MDP_Y_CBCR_H1V1, MDSS_MDP_CHROMA_RGB, C1_B_Cb, C2_R_Cr),
FMT_YUV_PSEUDO(MDP_Y_CRCB_H2V1, MDSS_MDP_CHROMA_H2V1, C2_R_Cr, C1_B_Cb),
FMT_YUV_PSEUDO(MDP_Y_CBCR_H2V1, MDSS_MDP_CHROMA_H2V1, C1_B_Cb, C2_R_Cr),
FMT_YUV_PSEUDO(MDP_Y_CRCB_H1V2, MDSS_MDP_CHROMA_H1V2, C2_R_Cr, C1_B_Cb),
FMT_YUV_PSEUDO(MDP_Y_CBCR_H1V2, MDSS_MDP_CHROMA_H1V2, C1_B_Cb, C2_R_Cr),
FMT_YUV_PSEUDO(MDP_Y_CRCB_H2V2, MDSS_MDP_CHROMA_420, C2_R_Cr, C1_B_Cb),
FMT_YUV_PSEUDO(MDP_Y_CBCR_H2V2, MDSS_MDP_CHROMA_420, C1_B_Cb, C2_R_Cr),
FMT_YUV_PSEUDO(MDP_Y_CBCR_H2V2_VENUS, MDSS_MDP_CHROMA_420,
C1_B_Cb, C2_R_Cr),
FMT_YUV_PSEUDO(MDP_Y_CRCB_H1V1, MDSS_MDP_FETCH_LINEAR,
MDSS_MDP_CHROMA_RGB, C2_R_Cr, C1_B_Cb),
FMT_YUV_PSEUDO(MDP_Y_CBCR_H1V1, MDSS_MDP_FETCH_LINEAR,
MDSS_MDP_CHROMA_RGB, C1_B_Cb, C2_R_Cr),
FMT_YUV_PSEUDO(MDP_Y_CRCB_H2V1, MDSS_MDP_FETCH_LINEAR,
MDSS_MDP_CHROMA_H2V1, C2_R_Cr, C1_B_Cb),
FMT_YUV_PSEUDO(MDP_Y_CBCR_H2V1, MDSS_MDP_FETCH_LINEAR,
MDSS_MDP_CHROMA_H2V1, C1_B_Cb, C2_R_Cr),
FMT_YUV_PSEUDO(MDP_Y_CRCB_H1V2, MDSS_MDP_FETCH_LINEAR,
MDSS_MDP_CHROMA_H1V2, C2_R_Cr, C1_B_Cb),
FMT_YUV_PSEUDO(MDP_Y_CBCR_H1V2, MDSS_MDP_FETCH_LINEAR,
MDSS_MDP_CHROMA_H1V2, C1_B_Cb, C2_R_Cr),
FMT_YUV_PSEUDO(MDP_Y_CRCB_H2V2, MDSS_MDP_FETCH_LINEAR,
MDSS_MDP_CHROMA_420, C2_R_Cr, C1_B_Cb),
FMT_YUV_PSEUDO(MDP_Y_CBCR_H2V2, MDSS_MDP_FETCH_LINEAR,
MDSS_MDP_CHROMA_420, C1_B_Cb, C2_R_Cr),
FMT_YUV_PSEUDO(MDP_Y_CBCR_H2V2_VENUS, MDSS_MDP_FETCH_LINEAR,
MDSS_MDP_CHROMA_420, C1_B_Cb, C2_R_Cr),
FMT_YUV_PLANR(MDP_Y_CB_CR_H2V2, MDSS_MDP_CHROMA_420, C2_R_Cr, C1_B_Cb),
FMT_YUV_PLANR(MDP_Y_CR_CB_H2V2, MDSS_MDP_CHROMA_420, C1_B_Cb, C2_R_Cr),
FMT_YUV_PLANR(MDP_Y_CR_CB_GH2V2, MDSS_MDP_CHROMA_420, C1_B_Cb, C2_R_Cr),
FMT_YUV_PLANR(MDP_Y_CB_CR_H2V2, MDSS_MDP_FETCH_LINEAR,
MDSS_MDP_CHROMA_420, C2_R_Cr, C1_B_Cb),
FMT_YUV_PLANR(MDP_Y_CR_CB_H2V2, MDSS_MDP_FETCH_LINEAR,
MDSS_MDP_CHROMA_420, C1_B_Cb, C2_R_Cr),
FMT_YUV_PLANR(MDP_Y_CR_CB_GH2V2, MDSS_MDP_FETCH_LINEAR,
MDSS_MDP_CHROMA_420, C1_B_Cb, C2_R_Cr),
{
FMT_YUV_COMMON(MDP_YCBCR_H1V1),
@ -241,6 +233,7 @@ static struct mdss_mdp_format_params mdss_mdp_format_map[] = {
.chroma_sample = MDSS_MDP_CHROMA_RGB,
.unpack_count = 3,
.bpp = 3,
.fetch_mode = MDSS_MDP_FETCH_LINEAR,
.element = { C2_R_Cr, C1_B_Cb, C0_G_Y },
},
{
@ -249,6 +242,7 @@ static struct mdss_mdp_format_params mdss_mdp_format_map[] = {
.chroma_sample = MDSS_MDP_CHROMA_RGB,
.unpack_count = 3,
.bpp = 3,
.fetch_mode = MDSS_MDP_FETCH_LINEAR,
.element = { C1_B_Cb, C2_R_Cr, C0_G_Y },
},
{
@ -257,6 +251,7 @@ static struct mdss_mdp_format_params mdss_mdp_format_map[] = {
.chroma_sample = MDSS_MDP_CHROMA_H2V1,
.unpack_count = 4,
.bpp = 2,
.fetch_mode = MDSS_MDP_FETCH_LINEAR,
.element = { C1_B_Cb, C0_G_Y, C2_R_Cr, C0_G_Y },
},
{
@ -265,6 +260,7 @@ static struct mdss_mdp_format_params mdss_mdp_format_map[] = {
.chroma_sample = MDSS_MDP_CHROMA_H2V1,
.unpack_count = 4,
.bpp = 2,
.fetch_mode = MDSS_MDP_FETCH_LINEAR,
.element = { C2_R_Cr, C0_G_Y, C1_B_Cb, C0_G_Y },
},
FMT_RGB_1555(MDP_RGBA_5551, 1, C3_ALPHA, C1_B_Cb, C0_G_Y, C2_R_Cr),

6
drivers/video/fbdev/msm/mdss_mdp_overlay.c
View file

@ -282,7 +282,7 @@ int mdss_mdp_overlay_req_check(struct msm_fb_data_type *mfd,
} else if (req->flags & MDP_BWC_EN) {
pr_err("Decimation can't be enabled with BWC\n");
return -EINVAL;
} else if (fmt->tile) {
} else if (fmt->fetch_mode != MDSS_MDP_FETCH_LINEAR) {
pr_err("Decimation can't be enabled with MacroTile format\n");
return -EINVAL;
}
@ -415,8 +415,8 @@ static int __mdp_pipe_tune_perf(struct mdss_mdp_pipe *pipe,
* mdp clock requirement
*/
if (mdata->has_decimation && (pipe->vert_deci < MAX_DECIMATION)
&& !pipe->bwc_mode && !pipe->src_fmt->tile &&
!pipe->scale.enable_pxl_ext)
&& !pipe->bwc_mode && !pipe->scale.enable_pxl_ext &&
(pipe->src_fmt == MDSS_MDP_FETCH_LINEAR))
pipe->vert_deci++;
else
return -E2BIG;

22
drivers/video/fbdev/msm/mdss_mdp_pipe.c
View file

@ -280,11 +280,11 @@ static void mdss_mdp_smp_set_wm_levels(struct mdss_mdp_pipe *pipe, int mb_cnt)
*/
latency_bytes = mdss_mdp_calc_latency_buf_bytes(pipe->src_fmt->is_yuv,
pipe->bwc_mode, pipe->src_fmt->tile, pipe->src.w,
pipe->src_fmt->bpp,
false, useable_space);
pipe->bwc_mode, mdss_mdp_is_tile_format(pipe->src_fmt),
pipe->src.w, pipe->src_fmt->bpp, false, useable_space);
if ((pipe->flags & MDP_FLIP_LR) && !pipe->src_fmt->tile) {
if ((pipe->flags & MDP_FLIP_LR) &&
!mdss_mdp_is_tile_format(pipe->src_fmt)) {
/*
* when doing hflip, one line is reserved to be consumed down
* the pipeline. This line will always be marked as full even
@ -298,7 +298,7 @@ static void mdss_mdp_smp_set_wm_levels(struct mdss_mdp_pipe *pipe, int mb_cnt)
}
if (IS_MDSS_MAJOR_MINOR_SAME(mdata->mdp_rev, MDSS_MDP_HW_REV_103) &&
(pipe->src_fmt->tile)) {
mdss_mdp_is_tile_format(pipe->src_fmt)) {
val = latency_bytes / SMP_MB_ENTRY_SIZE;
wm[0] = (val * 5) / 8;
@ -456,12 +456,12 @@ static u32 mdss_mdp_calc_per_plane_num_blks(u32 ystride,
if (pipe->mixer_left && (pipe->mixer_left->rotator_mode ||
(pipe->mixer_left->type == MDSS_MDP_MIXER_TYPE_WRITEBACK))) {
if (pipe->src_fmt->tile)
if (mdss_mdp_is_tile_format(pipe->src_fmt))
num_blks = 4;
else
num_blks = 1;
} else {
if (pipe->src_fmt->tile)
if (mdss_mdp_is_tile_format(pipe->src_fmt))
nlines = 8;
else
nlines = pipe->bwc_mode ? 1 : 2;
@ -479,8 +479,8 @@ static u32 mdss_mdp_calc_per_plane_num_blks(u32 ystride,
}
pr_debug("pipenum:%d tile:%d bwc:%d ystride%d pipeblks:%d blks:%d\n",
pipe->num, pipe->src_fmt->tile, pipe->bwc_mode, ystride,
mdata->smp_mb_per_pipe, num_blks);
pipe->num, mdss_mdp_is_tile_format(pipe->src_fmt),
pipe->bwc_mode, ystride, mdata->smp_mb_per_pipe, num_blks);
return num_blks;
}
@ -1474,7 +1474,7 @@ static int mdss_mdp_format_setup(struct mdss_mdp_pipe *pipe)
(fmt->bits[C1_B_Cb] << 2) |
(fmt->bits[C0_G_Y] << 0);
if (fmt->tile)
if (mdss_mdp_is_tile_format(fmt))
src_format |= BIT(30);
if (pipe->flags & MDP_ROT_90)
@ -1493,7 +1493,7 @@ static int mdss_mdp_format_setup(struct mdss_mdp_pipe *pipe)
mdss_mdp_pipe_sspp_setup(pipe, &opmode);
if (fmt->tile && mdata->highest_bank_bit) {
if (mdss_mdp_is_tile_format(fmt) && mdata->highest_bank_bit) {
mdss_mdp_pipe_write(pipe, MDSS_MDP_REG_SSPP_FETCH_CONFIG,
MDSS_MDP_FETCH_CONFIG_RESET_VALUE |
mdata->highest_bank_bit << 18);