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ARM: dts: msm: Add tune2_efuse_addr for SDM660/630

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Pass tune2_efuse_addr register and bit field to be read from the register
from the device tree, which will be used to read HS_TRIM value and update
the value to QUSB2_PHY_TUNE2_REGISTER for eye-diagram test passing.

Change-Id: I64b4febf41f2e2c027c1d220e7037d8eeec27d46
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>
This commit is contained in:
Vijayavardhan Vennapusa 2017-06-05 17:51:53 +05:30
parent 85baaeb2e2
commit c09e5063e1
1 changed files with 4 additions and 0 deletions
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4
arch/arm/boot/dts/qcom/sdm660-common.dtsi
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@ -268,14 +268,18 @@
compatible = "qcom,qusb2phy";
reg = <0x0c012000 0x180>,
<0x01fcb24c 0x4>,
<0x00780240 0x4>,
<0x00188018 0x4>;
reg-names = "qusb_phy_base",
"tcsr_clamp_dig_n_1p8",
"tune2_efuse_addr",
"ref_clk_addr";
vdd-supply = <&pm660l_l1>;
vdda18-supply = <&pm660_l10>;
vdda33-supply = <&pm660l_l7>;
qcom,vdd-voltage-level = <0 925000 925000>;
qcom,tune2-efuse-bit-pos = <25>;
qcom,tune2-efuse-num-bits = <4>;
qcom,qusb-phy-init-seq = <0xf8 0x80
0xb3 0x84
0x83 0x88