evie/android_kernel_oneplus_msm8998
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Merge "msm: ipa: fix hdr table full condition"

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Linux Build Service Account 2017-06-12 21:43:20 -07:00 • committed by Gerrit - the friendly Code Review server
commit c0f6993430
2 changed files with 63 additions and 61 deletions
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71
drivers/platform/msm/ipa/ipa_v2/ipa_hdr.c
View file

@ -600,12 +600,12 @@ static int __ipa_add_hdr_proc_ctx(struct ipa_hdr_proc_ctx_add *proc_ctx,
mem_size = (ipa_ctx->hdr_proc_ctx_tbl_lcl) ?
IPA_MEM_PART(apps_hdr_proc_ctx_size) :
IPA_MEM_PART(apps_hdr_proc_ctx_size_ddr);
if (htbl->end + ipa_hdr_proc_ctx_bin_sz[bin] > mem_size) {
IPAERR("hdr proc ctx table overflow\n");
goto bad_len;
}
if (list_empty(&htbl->head_free_offset_list[bin])) {
if (htbl->end + ipa_hdr_proc_ctx_bin_sz[bin] > mem_size) {
IPAERR("hdr proc ctx table overflow\n");
goto bad_len;
}
offset = kmem_cache_zalloc(ipa_ctx->hdr_proc_ctx_offset_cache,
GFP_KERNEL);
if (!offset) {
@ -711,30 +711,30 @@ static int __ipa_add_hdr(struct ipa_hdr_add *hdr)
mem_size = (ipa_ctx->hdr_tbl_lcl) ? IPA_MEM_PART(apps_hdr_size) :
IPA_MEM_PART(apps_hdr_size_ddr);
/*
* if header does not fit to table, place it in DDR
* This is valid for IPA 2.5 and on,
* with the exception of IPA2.6L.
*/
if (htbl->end + ipa_hdr_bin_sz[bin] > mem_size) {
if (ipa_ctx->ipa_hw_type != IPA_HW_v2_5) {
IPAERR("not enough room for header\n");
goto bad_hdr_len;
} else {
entry->is_hdr_proc_ctx = true;
entry->phys_base = dma_map_single(ipa_ctx->pdev,
entry->hdr,
entry->hdr_len,
DMA_TO_DEVICE);
if (dma_mapping_error(ipa_ctx->pdev,
entry->phys_base)) {
IPAERR("dma_map_single failure for entry\n");
goto fail_dma_mapping;
if (list_empty(&htbl->head_free_offset_list[bin])) {
/*
* if header does not fit to table, place it in DDR
* This is valid for IPA 2.5 and on,
* with the exception of IPA2.6L.
*/
if (htbl->end + ipa_hdr_bin_sz[bin] > mem_size) {
if (ipa_ctx->ipa_hw_type != IPA_HW_v2_5) {
IPAERR("not enough room for header\n");
goto bad_hdr_len;
} else {
entry->is_hdr_proc_ctx = true;
entry->phys_base = dma_map_single(ipa_ctx->pdev,
entry->hdr,
entry->hdr_len,
DMA_TO_DEVICE);
if (dma_mapping_error(ipa_ctx->pdev,
entry->phys_base)) {
IPAERR("dma_map_single failureed\n");
goto fail_dma_mapping;
}
}
}
} else {
entry->is_hdr_proc_ctx = false;
if (list_empty(&htbl->head_free_offset_list[bin])) {
} else {
entry->is_hdr_proc_ctx = false;
offset = kmem_cache_zalloc(ipa_ctx->hdr_offset_cache,
GFP_KERNEL);
if (!offset) {
@ -751,14 +751,15 @@ static int __ipa_add_hdr(struct ipa_hdr_add *hdr)
htbl->end += ipa_hdr_bin_sz[bin];
list_add(&offset->link,
&htbl->head_offset_list[bin]);
} else {
/* get the first free slot */
offset =
list_first_entry(&htbl->head_free_offset_list[bin],
struct ipa_hdr_offset_entry, link);
list_move(&offset->link, &htbl->head_offset_list[bin]);
entry->offset_entry = offset;
}
} else {
entry->is_hdr_proc_ctx = false;
/* get the first free slot */
offset =
list_first_entry(&htbl->head_free_offset_list[bin],
struct ipa_hdr_offset_entry, link);
list_move(&offset->link, &htbl->head_offset_list[bin]);
entry->offset_entry = offset;
}

53
drivers/platform/msm/ipa/ipa_v3/ipa_hdr.c
View file

@ -377,12 +377,12 @@ static int __ipa_add_hdr_proc_ctx(struct ipa_hdr_proc_ctx_add *proc_ctx,
mem_size = (ipa3_ctx->hdr_proc_ctx_tbl_lcl) ?
IPA_MEM_PART(apps_hdr_proc_ctx_size) :
IPA_MEM_PART(apps_hdr_proc_ctx_size_ddr);
if (htbl->end + ipa_hdr_proc_ctx_bin_sz[bin] > mem_size) {
IPAERR("hdr proc ctx table overflow\n");
goto bad_len;
}
if (list_empty(&htbl->head_free_offset_list[bin])) {
if (htbl->end + ipa_hdr_proc_ctx_bin_sz[bin] > mem_size) {
IPAERR("hdr proc ctx table overflow\n");
goto bad_len;
}
offset = kmem_cache_zalloc(ipa3_ctx->hdr_proc_ctx_offset_cache,
GFP_KERNEL);
if (!offset) {
@ -487,20 +487,21 @@ static int __ipa_add_hdr(struct ipa_hdr_add *hdr)
mem_size = (ipa3_ctx->hdr_tbl_lcl) ? IPA_MEM_PART(apps_hdr_size) :
IPA_MEM_PART(apps_hdr_size_ddr);
/* if header does not fit to table, place it in DDR */
if (htbl->end + ipa_hdr_bin_sz[bin] > mem_size) {
entry->is_hdr_proc_ctx = true;
entry->phys_base = dma_map_single(ipa3_ctx->pdev,
entry->hdr,
entry->hdr_len,
DMA_TO_DEVICE);
if (dma_mapping_error(ipa3_ctx->pdev, entry->phys_base)) {
IPAERR("dma_map_single failure for entry\n");
goto fail_dma_mapping;
}
} else {
entry->is_hdr_proc_ctx = false;
if (list_empty(&htbl->head_free_offset_list[bin])) {
if (list_empty(&htbl->head_free_offset_list[bin])) {
/* if header does not fit to table, place it in DDR */
if (htbl->end + ipa_hdr_bin_sz[bin] > mem_size) {
entry->is_hdr_proc_ctx = true;
entry->phys_base = dma_map_single(ipa3_ctx->pdev,
entry->hdr,
entry->hdr_len,
DMA_TO_DEVICE);
if (dma_mapping_error(ipa3_ctx->pdev,
entry->phys_base)) {
IPAERR("dma_map_single failure for entry\n");
goto fail_dma_mapping;
}
} else {
entry->is_hdr_proc_ctx = false;
offset = kmem_cache_zalloc(ipa3_ctx->hdr_offset_cache,
GFP_KERNEL);
if (!offset) {
@ -517,14 +518,14 @@ static int __ipa_add_hdr(struct ipa_hdr_add *hdr)
htbl->end += ipa_hdr_bin_sz[bin];
list_add(&offset->link,
&htbl->head_offset_list[bin]);
} else {
/* get the first free slot */
offset =
list_first_entry(&htbl->head_free_offset_list[bin],
struct ipa_hdr_offset_entry, link);
list_move(&offset->link, &htbl->head_offset_list[bin]);
entry->offset_entry = offset;
}
} else {
entry->is_hdr_proc_ctx = false;
/* get the first free slot */
offset = list_first_entry(&htbl->head_free_offset_list[bin],
struct ipa_hdr_offset_entry, link);
list_move(&offset->link, &htbl->head_offset_list[bin]);
entry->offset_entry = offset;
}