x86/PCI: update MMCONFIG information when hot-plugging PCI host bridges
This patch enhances x86 arch-specific code to update MMCONFIG information when PCI host bridge hotplug event happens. Reviewed-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Jiang Liu <liuj97@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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4 changed files with 93 additions and 5 deletions
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@ -100,6 +100,7 @@ struct pci_raw_ops {
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extern const struct pci_raw_ops *raw_pci_ops;
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extern const struct pci_raw_ops *raw_pci_ops;
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extern const struct pci_raw_ops *raw_pci_ext_ops;
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extern const struct pci_raw_ops *raw_pci_ext_ops;
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extern const struct pci_raw_ops pci_mmcfg;
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extern const struct pci_raw_ops pci_direct_conf1;
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extern const struct pci_raw_ops pci_direct_conf1;
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extern bool port_cf9_safe;
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extern bool port_cf9_safe;
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@ -13,6 +13,12 @@ struct pci_root_info {
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unsigned int res_num;
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unsigned int res_num;
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struct resource *res;
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struct resource *res;
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struct pci_sysdata sd;
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struct pci_sysdata sd;
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#ifdef CONFIG_PCI_MMCONFIG
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bool mcfg_added;
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u16 segment;
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u8 start_bus;
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u8 end_bus;
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#endif
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};
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};
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static bool pci_use_crs = true;
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static bool pci_use_crs = true;
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@ -119,6 +125,81 @@ void __init pci_acpi_crs_quirks(void)
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pci_use_crs ? "nocrs" : "use_crs");
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pci_use_crs ? "nocrs" : "use_crs");
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}
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}
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#ifdef CONFIG_PCI_MMCONFIG
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static int __devinit check_segment(u16 seg, struct device *dev, char *estr)
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{
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if (seg) {
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dev_err(dev,
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"%s can't access PCI configuration "
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"space under this host bridge.\n",
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estr);
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return -EIO;
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}
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/*
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* Failure in adding MMCFG information is not fatal,
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* just can't access extended configuration space of
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* devices under this host bridge.
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*/
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dev_warn(dev,
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"%s can't access extended PCI configuration "
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"space under this bridge.\n",
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estr);
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return 0;
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}
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static int __devinit setup_mcfg_map(struct pci_root_info *info,
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u16 seg, u8 start, u8 end,
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phys_addr_t addr)
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{
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int result;
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struct device *dev = &info->bridge->dev;
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info->start_bus = start;
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info->end_bus = end;
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info->mcfg_added = false;
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/* return success if MMCFG is not in use */
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if (raw_pci_ext_ops && raw_pci_ext_ops != &pci_mmcfg)
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return 0;
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if (!(pci_probe & PCI_PROBE_MMCONF))
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return check_segment(seg, dev, "MMCONFIG is disabled,");
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result = pci_mmconfig_insert(dev, seg, start, end, addr);
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if (result == 0) {
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/* enable MMCFG if it hasn't been enabled yet */
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if (raw_pci_ext_ops == NULL)
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raw_pci_ext_ops = &pci_mmcfg;
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info->mcfg_added = true;
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} else if (result != -EEXIST)
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return check_segment(seg, dev,
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"fail to add MMCONFIG information,");
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return 0;
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}
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static void teardown_mcfg_map(struct pci_root_info *info)
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{
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if (info->mcfg_added) {
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pci_mmconfig_delete(info->segment, info->start_bus,
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info->end_bus);
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info->mcfg_added = false;
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}
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}
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#else
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static int __devinit setup_mcfg_map(struct pci_root_info *info,
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u16 seg, u8 start, u8 end,
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phys_addr_t addr)
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{
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return 0;
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}
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static void teardown_mcfg_map(struct pci_root_info *info)
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{
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}
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#endif
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static acpi_status
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static acpi_status
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resource_to_addr(struct acpi_resource *resource,
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resource_to_addr(struct acpi_resource *resource,
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struct acpi_resource_address64 *addr)
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struct acpi_resource_address64 *addr)
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@ -331,8 +412,11 @@ static void __release_pci_root_info(struct pci_root_info *info)
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free_pci_root_info_res(info);
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free_pci_root_info_res(info);
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teardown_mcfg_map(info);
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kfree(info);
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kfree(info);
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}
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}
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static void release_pci_root_info(struct pci_host_bridge *bridge)
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static void release_pci_root_info(struct pci_host_bridge *bridge)
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{
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{
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struct pci_root_info *info = bridge->release_data;
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struct pci_root_info *info = bridge->release_data;
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@ -372,7 +456,7 @@ struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_pci_root *root)
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int domain = root->segment;
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int domain = root->segment;
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int busnum = root->secondary.start;
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int busnum = root->secondary.start;
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LIST_HEAD(resources);
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LIST_HEAD(resources);
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struct pci_bus *bus;
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struct pci_bus *bus = NULL;
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struct pci_sysdata *sd;
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struct pci_sysdata *sd;
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int node;
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int node;
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#ifdef CONFIG_ACPI_NUMA
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#ifdef CONFIG_ACPI_NUMA
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@ -438,8 +522,11 @@ struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_pci_root *root)
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x86_pci_root_bus_resources(busnum, &resources);
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x86_pci_root_bus_resources(busnum, &resources);
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}
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}
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bus = pci_create_root_bus(NULL, busnum, &pci_root_ops, sd,
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if (!setup_mcfg_map(info, domain, (u8)root->secondary.start,
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&resources);
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(u8)root->secondary.end, root->mcfg_addr))
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bus = pci_create_root_bus(NULL, busnum, &pci_root_ops,
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sd, &resources);
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if (bus) {
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if (bus) {
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pci_scan_child_bus(bus);
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pci_scan_child_bus(bus);
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pci_set_host_bridge_release(
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pci_set_host_bridge_release(
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@ -126,7 +126,7 @@ static int pci_mmcfg_write(unsigned int seg, unsigned int bus,
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return 0;
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return 0;
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}
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}
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static const struct pci_raw_ops pci_mmcfg = {
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const struct pci_raw_ops pci_mmcfg = {
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.read = pci_mmcfg_read,
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.read = pci_mmcfg_read,
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.write = pci_mmcfg_write,
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.write = pci_mmcfg_write,
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};
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};
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@ -90,7 +90,7 @@ static int pci_mmcfg_write(unsigned int seg, unsigned int bus,
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return 0;
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return 0;
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}
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}
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static const struct pci_raw_ops pci_mmcfg = {
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const struct pci_raw_ops pci_mmcfg = {
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.read = pci_mmcfg_read,
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.read = pci_mmcfg_read,
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.write = pci_mmcfg_write,
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.write = pci_mmcfg_write,
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};
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};
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