Revert "arm64: fpsimd: Enable FP(floating-point) settings for msm8996"
This reverts commit 2dae58c4af
("arm64: fpsimd: Enable
FP(floating-point) settings for msm8996").
Feature is not applicable to msmcobalt and only applicable
to MSM8996.
CRs-Fixed: 1054373
Change-Id: I8f21787f0a45dd9f7be8986b4f332f498add3203
Signed-off-by: Satya Durga Srinivasu Prabhala <satyap@codeaurora.org>
This commit is contained in:
parent
0a3bee11eb
commit
c14c8b7e55
6 changed files with 4 additions and 95 deletions
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@ -513,16 +513,6 @@ config ARM64_64K_PAGES
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endchoice
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endchoice
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config ENABLE_FP_SIMD_SETTINGS
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bool "Enable FP(Floating Point) Settings for Qualcomm MSM8996"
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depends on ARCH_MSM8996
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help
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Enable FP(Floating Point) and SIMD settings for the MSM8996 during
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the execution of the aarch32 processes and disable these settings
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when you switch to the aarch64 processes.
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If you are not sure what to do, select 'N' here.
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choice
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choice
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prompt "Virtual address space size"
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prompt "Virtual address space size"
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default ARM64_VA_BITS_39 if ARM64_4K_PAGES
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default ARM64_VA_BITS_39 if ARM64_4K_PAGES
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@ -23,7 +23,6 @@
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*/
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*/
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#include <asm/ptrace.h>
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#include <asm/ptrace.h>
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#include <asm/user.h>
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#include <asm/user.h>
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#include <asm/fpsimd.h>
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typedef unsigned long elf_greg_t;
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typedef unsigned long elf_greg_t;
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@ -178,13 +177,7 @@ typedef compat_elf_greg_t compat_elf_gregset_t[COMPAT_ELF_NGREG];
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((x)->e_flags & EF_ARM_EABI_MASK))
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((x)->e_flags & EF_ARM_EABI_MASK))
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#define compat_start_thread compat_start_thread
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#define compat_start_thread compat_start_thread
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#define COMPAT_SET_PERSONALITY(ex) \
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#define COMPAT_SET_PERSONALITY(ex) set_thread_flag(TIF_32BIT);
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do { \
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if (current->mm) \
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fpsimd_enable_trap(); \
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set_thread_flag(TIF_32BIT); \
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} while (0)
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#define COMPAT_ARCH_DLINFO
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#define COMPAT_ARCH_DLINFO
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extern int aarch32_setup_vectors_page(struct linux_binprm *bprm,
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extern int aarch32_setup_vectors_page(struct linux_binprm *bprm,
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int uses_interp);
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int uses_interp);
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@ -81,18 +81,6 @@ extern void fpsimd_save_partial_state(struct fpsimd_partial_state *state,
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u32 num_regs);
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u32 num_regs);
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extern void fpsimd_load_partial_state(struct fpsimd_partial_state *state);
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extern void fpsimd_load_partial_state(struct fpsimd_partial_state *state);
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#ifdef CONFIG_ENABLE_FP_SIMD_SETTINGS
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extern void fpsimd_disable_trap(void);
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extern void fpsimd_enable_trap(void);
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extern void fpsimd_settings_disable(void);
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extern void fpsimd_settings_enable(void);
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#else
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static inline void fpsimd_disable_trap(void) {}
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static inline void fpsimd_enable_trap(void) {}
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static inline void fpsimd_settings_disable(void) {}
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static inline void fpsimd_settings_enable(void) {}
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#endif
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#endif
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#endif
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#endif
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#endif
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@ -64,36 +64,4 @@ ENTRY(fpsimd_load_partial_state)
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ret
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ret
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ENDPROC(fpsimd_load_partial_state)
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ENDPROC(fpsimd_load_partial_state)
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#ifdef CONFIG_ENABLE_FP_SIMD_SETTINGS
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ENTRY(fpsimd_enable_trap)
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mrs x0, cpacr_el1
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bic x0, x0, #(3 << 20)
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orr x0, x0, #(1 << 20)
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msr cpacr_el1, x0
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ret
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ENDPROC(fpsimd_enable_trap)
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ENTRY(fpsimd_disable_trap)
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mrs x0, cpacr_el1
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orr x0, x0, #(3 << 20)
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msr cpacr_el1, x0
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ret
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ENDPROC(fpsimd_disable_trap)
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ENTRY(fpsimd_settings_enable)
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mrs x0, s3_1_c15_c15_0
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orr x0, x0, #(1 << 31)
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isb
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msr s3_1_c15_c15_0, x0
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isb
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ret
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ENDPROC(fpsimd_settings_enable)
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ENTRY(fpsimd_settings_disable)
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mrs x0, s3_1_c15_c15_0
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bic x0, x0, #(1 << 31)
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isb
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msr s3_1_c15_c15_0, x0
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isb
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ret
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ENDPROC(fpsimd_settings_disable)
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#endif
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#endif
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#endif
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@ -427,7 +427,7 @@ el0_sync_compat:
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cmp x24, #ESR_ELx_EC_IABT_LOW // instruction abort in EL0
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cmp x24, #ESR_ELx_EC_IABT_LOW // instruction abort in EL0
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b.eq el0_ia
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b.eq el0_ia
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cmp x24, #ESR_ELx_EC_FP_ASIMD // FP/ASIMD access
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cmp x24, #ESR_ELx_EC_FP_ASIMD // FP/ASIMD access
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b.eq el0_fpsimd_acc_compat
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b.eq el0_fpsimd_acc
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cmp x24, #ESR_ELx_EC_FP_EXC32 // FP/ASIMD exception
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cmp x24, #ESR_ELx_EC_FP_EXC32 // FP/ASIMD exception
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b.eq el0_fpsimd_exc
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b.eq el0_fpsimd_exc
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cmp x24, #ESR_ELx_EC_PC_ALIGN // pc alignment exception
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cmp x24, #ESR_ELx_EC_PC_ALIGN // pc alignment exception
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@ -498,17 +498,6 @@ el0_fpsimd_acc:
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mov x1, sp
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mov x1, sp
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bl do_fpsimd_acc
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bl do_fpsimd_acc
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b ret_to_user
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b ret_to_user
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el0_fpsimd_acc_compat:
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/*
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* Floating Point or Advanced SIMD access
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*/
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enable_dbg
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ct_user_exit
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mov x0, x25
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mov x1, sp
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bl do_fpsimd_acc_compat
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b ret_to_user
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el0_fpsimd_exc:
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el0_fpsimd_exc:
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/*
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/*
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* Floating Point or Advanced SIMD exception
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* Floating Point or Advanced SIMD exception
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@ -88,23 +88,14 @@
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* whatever is in the FPSIMD registers is not saved to memory, but discarded.
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* whatever is in the FPSIMD registers is not saved to memory, but discarded.
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*/
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*/
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static DEFINE_PER_CPU(struct fpsimd_state *, fpsimd_last_state);
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static DEFINE_PER_CPU(struct fpsimd_state *, fpsimd_last_state);
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static DEFINE_PER_CPU(int, fpsimd_stg_enable);
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/*
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/*
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* Trapped FP/ASIMD access.
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* Trapped FP/ASIMD access.
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*/
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*/
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void do_fpsimd_acc(unsigned int esr, struct pt_regs *regs)
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void do_fpsimd_acc(unsigned int esr, struct pt_regs *regs)
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{
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{
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fpsimd_disable_trap();
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/* TODO: implement lazy context saving/restoring */
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fpsimd_settings_disable();
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WARN_ON(1);
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this_cpu_write(fpsimd_stg_enable, 0);
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}
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void do_fpsimd_acc_compat(unsigned int esr, struct pt_regs *regs)
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{
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fpsimd_disable_trap();
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fpsimd_settings_enable();
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this_cpu_write(fpsimd_stg_enable, 1);
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}
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}
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/*
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/*
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if (current->mm && !test_thread_flag(TIF_FOREIGN_FPSTATE))
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if (current->mm && !test_thread_flag(TIF_FOREIGN_FPSTATE))
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fpsimd_save_state(¤t->thread.fpsimd_state);
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fpsimd_save_state(¤t->thread.fpsimd_state);
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if (__this_cpu_read(fpsimd_stg_enable)) {
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fpsimd_settings_disable();
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this_cpu_write(fpsimd_stg_enable, 0);
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}
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if (next->mm) {
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if (next->mm) {
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/*
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/*
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* If we are switching to a task whose most recent userland
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* If we are switching to a task whose most recent userland
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else
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else
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set_ti_thread_flag(task_thread_info(next),
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set_ti_thread_flag(task_thread_info(next),
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TIF_FOREIGN_FPSTATE);
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TIF_FOREIGN_FPSTATE);
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if (test_ti_thread_flag(task_thread_info(next), TIF_32BIT))
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fpsimd_enable_trap();
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else
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fpsimd_disable_trap();
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}
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}
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}
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}
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