staging: most: fix buffer size for DIM2

This patch reduces the DBR buffer size to prevent an overflow in the DIM2
module. It is needed, because the MediaLB hardware has problems with DBR
buffers that exceed the size of 255 messages.

Signed-off-by: Andrey Shvetsov <andrey.shvetsov@k2l.de>
Signed-off-by: Christian Gromm <christian.gromm@microchip.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Christian Gromm 2015-09-28 17:18:40 +02:00 committed by Greg Kroah-Hartman
parent f1b9a84382
commit c31d9d12ef

View file

@ -766,14 +766,14 @@ u8 DIM_InitControl(struct dim_channel *ch, u8 is_tx, u16 ch_address,
u16 max_buffer_size) u16 max_buffer_size)
{ {
return init_ctrl_async(ch, CAT_CT_VAL_CONTROL, is_tx, ch_address, return init_ctrl_async(ch, CAT_CT_VAL_CONTROL, is_tx, ch_address,
max_buffer_size * 2); max_buffer_size);
} }
u8 DIM_InitAsync(struct dim_channel *ch, u8 is_tx, u16 ch_address, u8 DIM_InitAsync(struct dim_channel *ch, u8 is_tx, u16 ch_address,
u16 max_buffer_size) u16 max_buffer_size)
{ {
return init_ctrl_async(ch, CAT_CT_VAL_ASYNC, is_tx, ch_address, return init_ctrl_async(ch, CAT_CT_VAL_ASYNC, is_tx, ch_address,
max_buffer_size * 2); max_buffer_size);
} }
u8 DIM_InitIsoc(struct dim_channel *ch, u8 is_tx, u16 ch_address, u8 DIM_InitIsoc(struct dim_channel *ch, u8 is_tx, u16 ch_address,