Merge "clk: qcom: Move the rbcpr clock voltage vote to active only"

This commit is contained in:
Linux Build Service Account 2017-01-19 19:10:33 -08:00 committed by Gerrit - the friendly Code Review server
commit c36e797898
2 changed files with 10 additions and 2 deletions

View file

@ -818,7 +818,7 @@ static struct clk_rcg2 hmss_rbcpr_clk_src = {
.parent_names = gcc_parent_names_ao_1,
.num_parents = 3,
.ops = &clk_rcg2_ops,
VDD_DIG_FMAX_MAP2(
VDD_DIG_FMAX_MAP2_AO(
LOWER, 19200000,
NOMINAL, 50000000),
},

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2016, The Linux Foundation. All rights reserved.
* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@ -95,6 +95,14 @@
}, \
.num_rate_max = VDD_DIG_NUM
#define VDD_DIG_FMAX_MAP2_AO(l1, f1, l2, f2) \
.vdd_class = &vdd_dig_ao, \
.rate_max = (unsigned long[VDD_DIG_NUM]) { \
[VDD_DIG_##l1] = (f1), \
[VDD_DIG_##l2] = (f2), \
}, \
.num_rate_max = VDD_DIG_NUM
#define VDD_DIG_FMAX_MAP3_AO(l1, f1, l2, f2, l3, f3) \
.vdd_class = &vdd_dig_ao, \
.rate_max = (unsigned long[VDD_DIG_NUM]) { \