From d3e47e331617af3c87138bd205e65c6fa1a1bca7 Mon Sep 17 00:00:00 2001 From: Ravi Kishore Tanuku Date: Wed, 22 Feb 2017 20:00:13 +0530 Subject: [PATCH] msm: camera: Add regulator enable and disable in csiphy 1. Corrected error handling conditions in csiphy driver while enabling clk regulator. 2. Adding gdsc regulator realted entries in dtsi. CRs-Fixed: 1107702 Change-Id: Iabb5eb28d63b34a4c3201c53be17054a1907f4fe Signed-off-by: Ravi Kishore Tanuku --- arch/arm/boot/dts/qcom/msm8996-camera.dtsi | 38 ++++++++++++++----- .../msm/camera_v2/sensor/csiphy/msm_csiphy.c | 23 ++++++++--- 2 files changed, 45 insertions(+), 16 deletions(-) diff --git a/arch/arm/boot/dts/qcom/msm8996-camera.dtsi b/arch/arm/boot/dts/qcom/msm8996-camera.dtsi index ec713e1b11fd..3ffd74e15f32 100644 --- a/arch/arm/boot/dts/qcom/msm8996-camera.dtsi +++ b/arch/arm/boot/dts/qcom/msm8996-camera.dtsi @@ -1,5 +1,5 @@ /* - * Copyright (c) 2014-2016, The Linux Foundation. All rights reserved. + * Copyright (c) 2014-2017, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -28,18 +28,24 @@ reg-names = "csiphy", "csiphy_clk_mux"; interrupts = <0 78 0>; interrupt-names = "csiphy"; - clocks = <&clock_mmss clk_camss_top_ahb_clk>, + qcom,csi-vdd-voltage = <1250000>; + qcom,mipi-csi-vdd-supply = <&pm8994_l2>; + mmagic-supply = <&gdsc_mmagic_camss>; + gdscr-supply = <&gdsc_camss_top>; + qcom,cam-vreg-name = "mmagic", "gdscr"; + clocks = <&clock_mmss clk_mmss_mmagic_ahb_clk>, + <&clock_mmss clk_camss_top_ahb_clk>, <&clock_mmss clk_camss_ispif_ahb_clk>, <&clock_mmss clk_csi0phytimer_clk_src>, <&clock_mmss clk_camss_csi0phytimer_clk>, <&clock_mmss clk_camss_ahb_clk>, <&clock_mmss clk_csiphy0_3p_clk_src>, <&clock_mmss clk_camss_csiphy0_3p_clk>; - clock-names = "camss_top_ahb_clk", + clock-names = "mmagic_ahb_clk", "camss_top_ahb_clk", "ispif_ahb_clk", "csiphy_timer_src_clk", "csiphy_timer_clk", "camss_ahb_clk", "csiphy_3p_clk_src", "csi_phy_3p_clk"; - qcom,clock-rates = <0 0 200000000 0 0 100000000 0>; + qcom,clock-rates = <0 0 0 200000000 0 0 100000000 0>; }; qcom,csiphy@a35000 { @@ -49,18 +55,24 @@ reg-names = "csiphy", "csiphy_clk_mux"; interrupts = <0 79 0>; interrupt-names = "csiphy"; - clocks = <&clock_mmss clk_camss_top_ahb_clk>, + qcom,csi-vdd-voltage = <1250000>; + qcom,mipi-csi-vdd-supply = <&pm8994_l2>; + mmagic-supply = <&gdsc_mmagic_camss>; + gdscr-supply = <&gdsc_camss_top>; + qcom,cam-vreg-name = "mmagic", "gdscr"; + clocks = <&clock_mmss clk_mmss_mmagic_ahb_clk>, + <&clock_mmss clk_camss_top_ahb_clk>, <&clock_mmss clk_camss_ispif_ahb_clk>, <&clock_mmss clk_csi1phytimer_clk_src>, <&clock_mmss clk_camss_csi1phytimer_clk>, <&clock_mmss clk_camss_ahb_clk>, <&clock_mmss clk_csiphy1_3p_clk_src>, <&clock_mmss clk_camss_csiphy1_3p_clk>; - clock-names = "camss_top_ahb_clk", + clock-names = "mmagic_ahb_clk", "camss_top_ahb_clk", "ispif_ahb_clk", "csiphy_timer_src_clk", "csiphy_timer_clk", "camss_ahb_clk", "csiphy_3p_clk_src", "csi_phy_3p_clk"; - qcom,clock-rates = <0 0 200000000 0 0 100000000 0>; + qcom,clock-rates = <0 0 0 200000000 0 0 100000000 0>; }; qcom,csiphy@a36000 { @@ -70,18 +82,24 @@ reg-names = "csiphy", "csiphy_clk_mux"; interrupts = <0 80 0>; interrupt-names = "csiphy"; - clocks = <&clock_mmss clk_camss_top_ahb_clk>, + qcom,csi-vdd-voltage = <1250000>; + qcom,mipi-csi-vdd-supply = <&pm8994_l2>; + mmagic-supply = <&gdsc_mmagic_camss>; + gdscr-supply = <&gdsc_camss_top>; + qcom,cam-vreg-name = "mmagic", "gdscr"; + clocks = <&clock_mmss clk_mmss_mmagic_ahb_clk>, + <&clock_mmss clk_camss_top_ahb_clk>, <&clock_mmss clk_camss_ispif_ahb_clk>, <&clock_mmss clk_csi2phytimer_clk_src>, <&clock_mmss clk_camss_csi2phytimer_clk>, <&clock_mmss clk_camss_ahb_clk>, <&clock_mmss clk_csiphy2_3p_clk_src>, <&clock_mmss clk_camss_csiphy2_3p_clk>; - clock-names = "camss_top_ahb_clk", + clock-names = "mmagic_ahb_clk", "camss_top_ahb_clk", "ispif_ahb_clk", "csiphy_timer_src_clk", "csiphy_timer_clk", "camss_ahb_clk", "csiphy_3p_clk_src", "csi_phy_3p_clk"; - qcom,clock-rates = <0 0 200000000 0 0 100000000 0>; + qcom,clock-rates = <0 0 0 200000000 0 0 100000000 0>; }; qcom,csid@a30000 { diff --git a/drivers/media/platform/msm/camera_v2/sensor/csiphy/msm_csiphy.c b/drivers/media/platform/msm/camera_v2/sensor/csiphy/msm_csiphy.c index be266641a105..214dd6f3406d 100644 --- a/drivers/media/platform/msm/camera_v2/sensor/csiphy/msm_csiphy.c +++ b/drivers/media/platform/msm/camera_v2/sensor/csiphy/msm_csiphy.c @@ -1069,7 +1069,7 @@ static int msm_csiphy_init(struct csiphy_device *csiphy_dev) if (rc < 0) { pr_err("%s:%d csiphy config_vreg failed\n", __func__, __LINE__); - goto csiphy_resource_fail; + goto csiphy_vreg_config_fail; } rc = msm_camera_enable_vreg(&csiphy_dev->pdev->dev, csiphy_dev->csiphy_vreg, @@ -1089,7 +1089,7 @@ static int msm_csiphy_init(struct csiphy_device *csiphy_dev) if (rc < 0) { pr_err("%s: csiphy clk enable failed\n", __func__); csiphy_dev->ref_count--; - goto csiphy_resource_fail; + goto csiphy_enable_clk_fail; } CDBG("%s:%d called\n", __func__, __LINE__); @@ -1117,12 +1117,17 @@ static int msm_csiphy_init(struct csiphy_device *csiphy_dev) csiphy_dev->csiphy_state = CSIPHY_POWER_UP; return 0; +csiphy_enable_clk_fail: + msm_camera_enable_vreg(&csiphy_dev->pdev->dev, + csiphy_dev->csiphy_vreg, + csiphy_dev->regulator_count, NULL, 0, + &csiphy_dev->csiphy_reg_ptr[0], 0); top_vreg_enable_failed: msm_camera_config_vreg(&csiphy_dev->pdev->dev, csiphy_dev->csiphy_vreg, csiphy_dev->regulator_count, NULL, 0, &csiphy_dev->csiphy_reg_ptr[0], 0); -csiphy_resource_fail: +csiphy_vreg_config_fail: if (cam_config_ahb_clk(NULL, 0, CAM_AHB_CLIENT_CSIPHY, CAM_AHB_SUSPEND_VOTE) < 0) pr_err("%s: failed to vote for AHB\n", __func__); @@ -1169,7 +1174,7 @@ static int msm_csiphy_init(struct csiphy_device *csiphy_dev) if (rc < 0) { pr_err("%s:%d csiphy config_vreg failed\n", __func__, __LINE__); - goto csiphy_resource_fail; + goto csiphy_vreg_config_fail; } rc = msm_camera_enable_vreg(&csiphy_dev->pdev->dev, csiphy_dev->csiphy_vreg, @@ -1189,7 +1194,7 @@ static int msm_csiphy_init(struct csiphy_device *csiphy_dev) if (rc < 0) { pr_err("%s: csiphy clk enable failed\n", __func__); csiphy_dev->ref_count--; - goto csiphy_resource_fail; + goto csiphy_enable_clk_fail; } CDBG("%s:%d clk enable success\n", __func__, __LINE__); @@ -1213,12 +1218,18 @@ static int msm_csiphy_init(struct csiphy_device *csiphy_dev) csiphy_dev->hw_version); csiphy_dev->csiphy_state = CSIPHY_POWER_UP; return 0; + +csiphy_enable_clk_fail: + msm_camera_enable_vreg(&csiphy_dev->pdev->dev, + csiphy_dev->csiphy_vreg, + csiphy_dev->regulator_count, NULL, 0, + &csiphy_dev->csiphy_reg_ptr[0], 0); top_vreg_enable_failed: msm_camera_config_vreg(&csiphy_dev->pdev->dev, csiphy_dev->csiphy_vreg, csiphy_dev->regulator_count, NULL, 0, &csiphy_dev->csiphy_reg_ptr[0], 0); -csiphy_resource_fail: +csiphy_vreg_config_fail: if (cam_config_ahb_clk(NULL, 0, CAM_AHB_CLIENT_CSIPHY, CAM_AHB_SUSPEND_VOTE) < 0) pr_err("%s: failed to vote for AHB\n", __func__);