From 4937604179185345a526ae1ad3e2fd906a4f2b56 Mon Sep 17 00:00:00 2001 From: Aravind Venkateswaran Date: Tue, 28 Jun 2016 12:00:11 -0700 Subject: [PATCH 1/3] clk: msm: mdss: fix calculation of VCO rate during handoff When continuous splash screen feature is enabled, the DSI PLL is configured in the bootloader and left on when the kernel boots up. When the PLL clocks are handed off, the VCO rate needs to be computed back from the registers. Fix bugs in the current implementation for calculating the VCO rate. CRs-Fixed: 1037857 Change-Id: I8905b91f26a66d26959fb109480f0390851cbdb4 Signed-off-by: Aravind Venkateswaran --- drivers/clk/msm/mdss/mdss-dsi-pll-cobalt.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/clk/msm/mdss/mdss-dsi-pll-cobalt.c b/drivers/clk/msm/mdss/mdss-dsi-pll-cobalt.c index e6153553e48a..1751f49b798c 100644 --- a/drivers/clk/msm/mdss/mdss-dsi-pll-cobalt.c +++ b/drivers/clk/msm/mdss/mdss-dsi-pll-cobalt.c @@ -509,7 +509,7 @@ static unsigned long dsi_pll_get_vco_rate(struct clk *c) 16); /* OUTDIV_1:0 field is (log(outdiv, 2)) */ - outdiv = MDSS_PLL_REG_R(pll->pll_base, PLL_OUTDIV); + outdiv = MDSS_PLL_REG_R(pll->pll_base, PLL_PLL_OUTDIV_RATE); outdiv &= 0x3; outdiv = 1 << outdiv; @@ -521,12 +521,12 @@ static unsigned long dsi_pll_get_vco_rate(struct clk *c) multiplier = 1 << 18; pll_freq = dec * (ref_clk * 2); tmp64 = (ref_clk * 2 * frac); - pll_freq += do_div(tmp64, multiplier); + pll_freq += div_u64(tmp64, multiplier); - vco_rate = do_div(pll_freq, outdiv); + vco_rate = div_u64(pll_freq, outdiv); - pr_debug("dec=0x%x\n, frac=0x%x, outdiv=%d, vco=%lu\n", - dec, frac, outdiv, (unsigned long)vco_rate); + pr_debug("dec=0x%x, frac=0x%x, outdiv=%d, vco=%llu\n", + dec, frac, outdiv, vco_rate); (void)mdss_pll_resource_enable(pll, false); From 8c2cc950a27d3abd0da79e05444a122feef1496a Mon Sep 17 00:00:00 2001 From: Aravind Venkateswaran Date: Tue, 28 Jun 2016 11:50:08 -0700 Subject: [PATCH 2/3] ARM: dts: msm: add proxy vote for BIMC SMMU GDSC for msmcobalt When continuous splash screen feature is enabled, the display needs to be kept alive during the kernel boot up. For video mode panels, frame data needs to be continuously fetched from the framebuffer memory which requires BIMC SMMU GDSC to remain on. Add proxy vote for this GDSC to prevent it from being turned off until the display driver hand off can be executed. CRs-Fixed: 1037857 Change-Id: Idef763153cdce4e59684da872520eb0cb0b1434d Signed-off-by: Aravind Venkateswaran --- arch/arm/boot/dts/qcom/msmcobalt.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/qcom/msmcobalt.dtsi b/arch/arm/boot/dts/qcom/msmcobalt.dtsi index 90d1ecd8f29c..a4cbf0c6fbcc 100644 --- a/arch/arm/boot/dts/qcom/msmcobalt.dtsi +++ b/arch/arm/boot/dts/qcom/msmcobalt.dtsi @@ -2774,6 +2774,8 @@ &gdsc_bimc_smmu { clock-names = "bus_clk"; clocks = <&clock_mmss clk_mmss_bimc_smmu_axi_clk>; + proxy-supply = <&gdsc_bimc_smmu>; + qcom,proxy-consumer-enable; status = "ok"; }; From 0730f45df200ae496737a65aa6c7174dd3c90d97 Mon Sep 17 00:00:00 2001 From: Aravind Venkateswaran Date: Wed, 22 Jun 2016 12:17:56 -0700 Subject: [PATCH 3/3] ARM: dts: msm: enable qcom,no-smr-check for mmss smmu for msmcobalt The continuous splash screen use case requires that we don't touch the MMSS SMR registers during probe. Enable the option for skipping the check for msmcobalt. CRs-Fixed: 1037857 Change-Id: I1d522796d1dc0c73f7fe068c0964a9b5d1a09285 Signed-off-by: Aravind Venkateswaran --- arch/arm/boot/dts/qcom/msm-arm-smmu-cobalt.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/qcom/msm-arm-smmu-cobalt.dtsi b/arch/arm/boot/dts/qcom/msm-arm-smmu-cobalt.dtsi index 97abec77bed7..ab46221089f3 100644 --- a/arch/arm/boot/dts/qcom/msm-arm-smmu-cobalt.dtsi +++ b/arch/arm/boot/dts/qcom/msm-arm-smmu-cobalt.dtsi @@ -113,6 +113,7 @@ reg = <0xcd00000 0x40000>; #iommu-cells = <1>; qcom,register-save; + qcom,no-smr-check; qcom,skip-init; #global-interrupts = <2>; interrupts = ,