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drivers: mfd: wcd9xxx: Add support to configure dmic clock

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DMIC clock on ECPP(Echo Cancellation Ping-Pong) path can be set to
lower clock rate to avoid power consumption. Change configures the
DMIC clock rate on ECPP path based on device tree settings.

CRs-fixed: 1022917
Change-Id: I03e1a7f5ef3cf1b1907c03a3d38965ce3a611bc4
Signed-off-by: Sudheer Papothi <spapothi@codeaurora.org>
Signed-off-by: Vidyakumar Athota <vathota@codeaurora.org>
This commit is contained in:
Sudheer Papothi 2016-05-19 20:29:13 +05:30 • committed by Gerrit - the friendly Code Review server
parent 4966222ae1
commit c5ee57ee2b
3 changed files with 19 additions and 0 deletions
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8
Documentation/devicetree/bindings/sound/wcd_codec.txt
View file

@ -92,6 +92,14 @@ Optional properties:
involving DMIC will use the rate defined by involving DMIC will use the rate defined by
cdc-dmic-sample-rate. cdc-dmic-sample-rate.
- qcom,cdc-ecpp-dmic-rate: Specifies the sample rate of digital mic in HZ to be
used by ECPP (Echo Cancellation Ping Pong) block
on the codec. The valid set of values are same
as that of cdc-dmic-sample-rate, but this rate will
only be used by ECPP and all other audio use cases
involving DMIC will use the rate defined by
cdc-dmic-sample-rate.
- qcom,cdc-dmic-clk-drv-strength: Specifies the drive strength for digital microphone - qcom,cdc-dmic-clk-drv-strength: Specifies the drive strength for digital microphone
clock in the codec. Accepted values are 2,4,8 and 16. clock in the codec. Accepted values are 2,4,8 and 16.
The clock drive strentgh is in uA. Codec driver will The clock drive strentgh is in uA. Codec driver will

10
drivers/mfd/wcd9xxx-utils.c
View file

@ -298,6 +298,7 @@ struct wcd9xxx_pdata *wcd9xxx_populate_dt_data(struct device *dev)
struct wcd9xxx_pdata *pdata; struct wcd9xxx_pdata *pdata;
u32 dmic_sample_rate = WCD9XXX_DMIC_SAMPLE_RATE_UNDEFINED; u32 dmic_sample_rate = WCD9XXX_DMIC_SAMPLE_RATE_UNDEFINED;
u32 mad_dmic_sample_rate = WCD9XXX_DMIC_SAMPLE_RATE_UNDEFINED; u32 mad_dmic_sample_rate = WCD9XXX_DMIC_SAMPLE_RATE_UNDEFINED;
u32 ecpp_dmic_sample_rate = WCD9XXX_DMIC_SAMPLE_RATE_UNDEFINED;
u32 dmic_clk_drive = WCD9XXX_DMIC_CLK_DRIVE_UNDEFINED; u32 dmic_clk_drive = WCD9XXX_DMIC_CLK_DRIVE_UNDEFINED;
u32 prop_val; u32 prop_val;
@ -358,6 +359,15 @@ struct wcd9xxx_pdata *wcd9xxx_populate_dt_data(struct device *dev)
pdata->mclk_rate, pdata->mclk_rate,
"mad_dmic_rate"); "mad_dmic_rate");
if (!(wcd9xxx_read_of_property_u32(dev, "qcom,cdc-ecpp-dmic-rate",
&prop_val)))
ecpp_dmic_sample_rate = prop_val;
pdata->ecpp_dmic_sample_rate = wcd9xxx_validate_dmic_sample_rate(dev,
ecpp_dmic_sample_rate,
pdata->mclk_rate,
"ecpp_dmic_rate");
if (!(of_property_read_u32(dev->of_node, if (!(of_property_read_u32(dev->of_node,
"qcom,cdc-dmic-clk-drv-strength", "qcom,cdc-dmic-clk-drv-strength",
&prop_val))) &prop_val)))

1
include/linux/mfd/wcd9xxx/pdata.h
View file

@ -189,6 +189,7 @@ struct wcd9xxx_pdata {
u32 mclk_rate; u32 mclk_rate;
u32 dmic_sample_rate; u32 dmic_sample_rate;
u32 mad_dmic_sample_rate; u32 mad_dmic_sample_rate;
u32 ecpp_dmic_sample_rate;
u32 dmic_clk_drv; u32 dmic_clk_drv;
u16 use_pinctrl; u16 use_pinctrl;
}; };