arm64: lse: rename ARM64_CPU_FEAT_LSE_ATOMICS for consistency
Other CPU features follow an 'ARM64_HAS_*' naming scheme, so do the same for the LSE atomics. Signed-off-by: Will Deacon <will.deacon@arm.com>
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3 changed files with 4 additions and 4 deletions
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@ -26,7 +26,7 @@
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#define ARM64_WORKAROUND_845719 2
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#define ARM64_WORKAROUND_845719 2
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#define ARM64_HAS_SYSREG_GIC_CPUIF 3
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#define ARM64_HAS_SYSREG_GIC_CPUIF 3
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#define ARM64_HAS_PAN 4
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#define ARM64_HAS_PAN 4
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#define ARM64_CPU_FEAT_LSE_ATOMICS 5
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#define ARM64_HAS_LSE_ATOMICS 5
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#define ARM64_NCAPS 6
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#define ARM64_NCAPS 6
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@ -12,7 +12,7 @@
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.arch_extension lse
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.arch_extension lse
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.macro alt_lse, llsc, lse
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.macro alt_lse, llsc, lse
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alternative_insn "\llsc", "\lse", ARM64_CPU_FEAT_LSE_ATOMICS
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alternative_insn "\llsc", "\lse", ARM64_HAS_LSE_ATOMICS
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.endm
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.endm
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#else /* __ASSEMBLER__ */
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#else /* __ASSEMBLER__ */
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@ -29,7 +29,7 @@ __asm__(".arch_extension lse");
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/* In-line patching at runtime */
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/* In-line patching at runtime */
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#define ARM64_LSE_ATOMIC_INSN(llsc, lse) \
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#define ARM64_LSE_ATOMIC_INSN(llsc, lse) \
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ALTERNATIVE(llsc, lse, ARM64_CPU_FEAT_LSE_ATOMICS)
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ALTERNATIVE(llsc, lse, ARM64_HAS_LSE_ATOMICS)
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#endif /* __ASSEMBLER__ */
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#endif /* __ASSEMBLER__ */
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#else /* CONFIG_AS_LSE && CONFIG_ARM64_LSE_ATOMICS */
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#else /* CONFIG_AS_LSE && CONFIG_ARM64_LSE_ATOMICS */
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@ -284,7 +284,7 @@ static void __init setup_processor(void)
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default:
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default:
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case 2:
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case 2:
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elf_hwcap |= HWCAP_ATOMICS;
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elf_hwcap |= HWCAP_ATOMICS;
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cpus_set_cap(ARM64_CPU_FEAT_LSE_ATOMICS);
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cpus_set_cap(ARM64_HAS_LSE_ATOMICS);
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if (IS_ENABLED(CONFIG_AS_LSE) &&
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if (IS_ENABLED(CONFIG_AS_LSE) &&
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IS_ENABLED(CONFIG_ARM64_LSE_ATOMICS))
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IS_ENABLED(CONFIG_ARM64_LSE_ATOMICS))
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pr_info("LSE atomics supported\n");
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pr_info("LSE atomics supported\n");
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