Merge "ARM: dts: msm: Enable CAN controller for msm8996 CV2X boards"
This commit is contained in:
commit
c85421c41a
6 changed files with 74 additions and 40 deletions
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@ -3,15 +3,20 @@
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This driver implements SPI slave protocol for Freescale K61 CAN controller.
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This driver implements SPI slave protocol for Freescale K61 CAN controller.
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Required properties:
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Required properties:
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- compatible: Should be "fsl,k61".
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- compatible: Should be "fsl,k61" or "nxp,mpc5746c".
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- reg: Should contain SPI chip select.
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- reg: Should contain SPI chip select.
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- interrupt-parent: Should specify interrupt controller for the interrupt.
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- interrupt-parent: Should specify interrupt controller for the interrupt.
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- interrupts: Should contain IRQ line for the CAN controller.
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- interrupts: Should contain IRQ line for the CAN controller.
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Optional properties:
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- reset-gpio: Reference to the GPIO connected to the reset input.
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- reset-gpio: Reference to the GPIO connected to the reset input.
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- pinctrl-names : Names corresponding to the numbered pinctrl states.
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- pinctrl-names : Names corresponding to the numbered pinctrl states.
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- pinctrl-0 : This explains the active state of the GPIO line.
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- pinctrl-0 : This explains the active state of the GPIO line.
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- pinctrl-1 : This explains the suspend state of the GPIO line.
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- pinctrl-1 : This explains the suspend state of the GPIO line.
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- bits-per-word: Indicate how many bits are in a SPI frame. e.g.: 8, 16, 32.
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Default to 16.
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- reset-delay-msec: Delay in milliseconds to be applied after resetting the chip.
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Default to 1 ms.
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Example:
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Example:
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@ -24,4 +29,6 @@ Example:
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pinctrl-names = "active", "sleep";
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pinctrl-names = "active", "sleep";
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pinctrl-0 = <&can_rst_on>;
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pinctrl-0 = <&can_rst_on>;
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pinctrl-1 = <&can_rst_off>;
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pinctrl-1 = <&can_rst_off>;
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bits-per-word = <8>;
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reset-delay-msec = <100>;
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};
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};
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@ -216,11 +216,18 @@
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&spi_9 {
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&spi_9 {
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status = "okay";
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status = "okay";
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/* CAN controller */
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can-controller@0 {
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spi@0 {
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compatible = "nxp,mpc5746c";
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compatible = "nxp,mpc57xx";
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reg = <0>;
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reg = <0>;
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spi-max-frequency = <19200000>;
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spi-max-frequency = <9600000>;
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interrupt-parent = <&tlmm>;
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interrupts = <78 0>;
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reset-gpio = <&tlmm 71 GPIO_ACTIVE_LOW>;
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bits-per-word = <8>;
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reset-delay-msec = <100>;
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pinctrl-names = "active", "sleep";
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pinctrl-0 = <&can_rst_on>;
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pinctrl-1 = <&can_rst_off>;
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};
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};
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};
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};
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@ -400,12 +407,6 @@
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status = "okay";
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status = "okay";
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};
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};
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&tlmm {
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/* Set these up as hogs */
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pinctrl-names = "default";
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pinctrl-0 = <&can_reset_gpio>;
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};
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&pm8994_gpios {
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&pm8994_gpios {
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gpio@c700 { /* GPIO 8 - WLAN_EN */
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gpio@c700 { /* GPIO 8 - WLAN_EN */
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qcom,mode = <1>; /* Digital output*/
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qcom,mode = <1>; /* Digital output*/
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@ -2745,17 +2745,32 @@
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};
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};
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};
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};
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can_reset_gpio: can_reset_gpio {
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can_reset {
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mux {
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can_rst_on: rst_on {
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pins = "gpio71";
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mux {
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function = "gpio";
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pins = "gpio71";
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function = "gpio";
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};
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config {
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pins = "gpio71";
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drive-strength = <2>; /* 2 mA */
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bias-pull-up;
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};
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};
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};
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config {
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can_rst_off: rst_off {
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pins = "gpio71";
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mux {
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drive-strength = <2>;
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pins = "gpio71";
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output-high;
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function = "gpio";
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bias-pull-up;
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};
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config {
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pins = "gpio71";
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drive-strength = <2>; /* 2 mA */
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bias-pull-up;
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output-high;
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};
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};
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};
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};
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};
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};
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};
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@ -220,6 +220,7 @@ CONFIG_RMNET_DATA_DEBUG_PKT=y
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CONFIG_SOCKEV_NLMCAST=y
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CONFIG_SOCKEV_NLMCAST=y
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CONFIG_CAN=y
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CONFIG_CAN=y
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CONFIG_CAN_RH850=y
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CONFIG_CAN_RH850=y
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CONFIG_CAN_K61=y
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CONFIG_BT=y
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CONFIG_BT=y
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CONFIG_MSM_BT_POWER=y
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CONFIG_MSM_BT_POWER=y
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CONFIG_BTFM_SLIM=y
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CONFIG_BTFM_SLIM=y
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@ -222,6 +222,7 @@ CONFIG_RMNET_DATA_DEBUG_PKT=y
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CONFIG_SOCKEV_NLMCAST=y
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CONFIG_SOCKEV_NLMCAST=y
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CONFIG_CAN=y
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CONFIG_CAN=y
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CONFIG_CAN_RH850=y
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CONFIG_CAN_RH850=y
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CONFIG_CAN_K61=y
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CONFIG_BT=y
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CONFIG_BT=y
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CONFIG_MSM_BT_POWER=y
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CONFIG_MSM_BT_POWER=y
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CONFIG_BTFM_SLIM=y
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CONFIG_BTFM_SLIM=y
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@ -57,6 +57,8 @@ struct k61_can {
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int reset;
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int reset;
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int wait_cmd;
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int wait_cmd;
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int cmd_result;
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int cmd_result;
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int bits_per_word;
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int reset_delay_msec;
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};
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};
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struct k61_netdev_privdata {
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struct k61_netdev_privdata {
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@ -310,7 +312,7 @@ static int k61_do_spi_transaction(struct k61_can *priv_data)
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xfer->tx_buf = priv_data->tx_buf;
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xfer->tx_buf = priv_data->tx_buf;
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xfer->rx_buf = priv_data->rx_buf;
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xfer->rx_buf = priv_data->rx_buf;
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xfer->len = XFER_BUFFER_SIZE;
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xfer->len = XFER_BUFFER_SIZE;
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xfer->bits_per_word = 16;
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xfer->bits_per_word = priv_data->bits_per_word;
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ret = spi_sync(spi, msg);
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ret = spi_sync(spi, msg);
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LOGDI("spi_sync ret %d\n", ret);
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LOGDI("spi_sync ret %d\n", ret);
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@ -829,25 +831,31 @@ static int k61_probe(struct spi_device *spi)
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}
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}
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dev_dbg(dev, "k61_probe created priv_data");
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dev_dbg(dev, "k61_probe created priv_data");
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priv_data->reset = of_get_named_gpio(spi->dev.of_node, "reset-gpio", 0);
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err = of_property_read_u32(spi->dev.of_node, "bits-per-word",
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if (!gpio_is_valid(priv_data->reset)) {
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&priv_data->bits_per_word);
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dev_err(&spi->dev, "Missing dt property: reset-gpio\n");
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if (err)
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return -EINVAL;
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priv_data->bits_per_word = 16;
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}
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err = gpio_request(priv_data->reset, "k61-reset");
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if (err < 0) {
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dev_err(&spi->dev,
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"failed to request gpio %d: %d\n",
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priv_data->reset, err);
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}
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gpio_direction_output(priv_data->reset, 0);
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err = of_property_read_u32(spi->dev.of_node, "reset-delay-msec",
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udelay(1);
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&priv_data->reset_delay_msec);
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gpio_direction_output(priv_data->reset, 1);
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if (err)
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/* Provide a delay of 300us for the chip to reset. This is part of
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priv_data->reset_delay_msec = 1;
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* the reset sequence.
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*/
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priv_data->reset = of_get_named_gpio(spi->dev.of_node, "reset-gpio", 0);
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usleep_range(300, 301);
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if (gpio_is_valid(priv_data->reset)) {
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err = gpio_request(priv_data->reset, "k61-reset");
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if (err < 0) {
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dev_err(&spi->dev,
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"failed to request gpio %d: %d\n",
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priv_data->reset, err);
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goto cleanup_candev;
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}
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gpio_direction_output(priv_data->reset, 0);
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udelay(1);
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gpio_direction_output(priv_data->reset, 1);
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msleep(priv_data->reset_delay_msec);
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}
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err = k61_create_netdev(spi, priv_data);
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err = k61_create_netdev(spi, priv_data);
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if (err) {
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if (err) {
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@ -909,6 +917,7 @@ static int k61_remove(struct spi_device *spi)
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static const struct of_device_id k61_match_table[] = {
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static const struct of_device_id k61_match_table[] = {
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{ .compatible = "fsl,k61" },
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{ .compatible = "fsl,k61" },
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{ .compatible = "nxp,mpc5746c" },
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{ }
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{ }
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};
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};
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