staging: comedi: ni_tio: tidy up enum ni_m_series_clock_source
These values are not used as an enum. For aesthetics, rename the CamelCase values and convert them into defines. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Reviewed-by: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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1 changed files with 31 additions and 31 deletions
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@ -125,23 +125,23 @@ enum ni_660x_clock_source {
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#define NI_660X_MAX_SRC_PIN 7
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#define NI_660X_SRC_PIN_CLK(x) (0x2 + (x))
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/* clock sources for ni e and m series boards, get bits with Gi_Source_Select_Bits() */
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enum ni_m_series_clock_source {
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NI_M_Series_Timebase_1_Clock = 0x0, /* 20MHz */
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NI_M_Series_Timebase_2_Clock = 0x12, /* 100KHz */
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NI_M_Series_Next_TC_Clock = 0x13,
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NI_M_Series_Next_Gate_Clock = 0x14, /* when Gi_Src_SubSelect = 0 */
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NI_M_Series_PXI_Star_Trigger_Clock = 0x14, /* when Gi_Src_SubSelect = 1 */
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NI_M_Series_PXI10_Clock = 0x1d,
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NI_M_Series_Timebase_3_Clock = 0x1e, /* 80MHz, when Gi_Src_SubSelect = 0 */
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NI_M_Series_Analog_Trigger_Out_Clock = 0x1e, /* when Gi_Src_SubSelect = 1 */
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NI_M_Series_Logic_Low_Clock = 0x1f,
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};
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#define NI_M_MAX_PFI_CHAN 15
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/*
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* clock sources for ni e and m series boards,
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* get bits with Gi_Source_Select_Bits()
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*/
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#define NI_M_TIMEBASE_1_CLK 0x0 /* 20MHz */
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#define NI_M_PFI_CLK(x) (((x) < 10) ? (1 + (x)) : (0xb + (x)))
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#define NI_M_MAX_RTSI_CHAN 7
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#define NI_M_RTSI_CLK(x) (((x) == 7) ? 0x1b : (0xb + (x)))
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#define NI_M_TIMEBASE_2_CLK 0x12 /* 100KHz */
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#define NI_M_NEXT_TC_CLK 0x13
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#define NI_M_NEXT_GATE_CLK 0x14 /* Gi_Src_SubSelect=0 */
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#define NI_M_PXI_STAR_TRIGGER_CLK 0x14 /* Gi_Src_SubSelect=1 */
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#define NI_M_PXI10_CLK 0x1d
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#define NI_M_TIMEBASE_3_CLK 0x1e /* 80MHz, Gi_Src_SubSelect=0 */
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#define NI_M_ANALOG_TRIGGER_OUT_CLK 0x1e /* Gi_Src_SubSelect=1 */
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#define NI_M_LOGIC_LOW_CLK 0x1f
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#define NI_M_MAX_PFI_CHAN 15
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#define NI_M_MAX_RTSI_CHAN 7
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/* NI660X gate select */
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#define NI_660X_SRC_PIN_I_GATE_SEL 0x0
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@ -538,31 +538,31 @@ static unsigned ni_m_series_source_select_bits(unsigned int clock_source)
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clock_source & NI_GPCT_CLOCK_SRC_SELECT_MASK;
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switch (clock_select_bits) {
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case NI_GPCT_TIMEBASE_1_CLOCK_SRC_BITS:
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ni_m_series_clock = NI_M_Series_Timebase_1_Clock;
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ni_m_series_clock = NI_M_TIMEBASE_1_CLK;
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break;
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case NI_GPCT_TIMEBASE_2_CLOCK_SRC_BITS:
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ni_m_series_clock = NI_M_Series_Timebase_2_Clock;
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ni_m_series_clock = NI_M_TIMEBASE_2_CLK;
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break;
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case NI_GPCT_TIMEBASE_3_CLOCK_SRC_BITS:
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ni_m_series_clock = NI_M_Series_Timebase_3_Clock;
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ni_m_series_clock = NI_M_TIMEBASE_3_CLK;
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break;
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case NI_GPCT_LOGIC_LOW_CLOCK_SRC_BITS:
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ni_m_series_clock = NI_M_Series_Logic_Low_Clock;
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ni_m_series_clock = NI_M_LOGIC_LOW_CLK;
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break;
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case NI_GPCT_NEXT_GATE_CLOCK_SRC_BITS:
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ni_m_series_clock = NI_M_Series_Next_Gate_Clock;
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ni_m_series_clock = NI_M_NEXT_GATE_CLK;
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break;
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case NI_GPCT_NEXT_TC_CLOCK_SRC_BITS:
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ni_m_series_clock = NI_M_Series_Next_TC_Clock;
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ni_m_series_clock = NI_M_NEXT_TC_CLK;
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break;
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case NI_GPCT_PXI10_CLOCK_SRC_BITS:
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ni_m_series_clock = NI_M_Series_PXI10_Clock;
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ni_m_series_clock = NI_M_PXI10_CLK;
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break;
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case NI_GPCT_PXI_STAR_TRIGGER_CLOCK_SRC_BITS:
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ni_m_series_clock = NI_M_Series_PXI_Star_Trigger_Clock;
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ni_m_series_clock = NI_M_PXI_STAR_TRIGGER_CLK;
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break;
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case NI_GPCT_ANALOG_TRIGGER_OUT_CLOCK_SRC_BITS:
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ni_m_series_clock = NI_M_Series_Analog_Trigger_Out_Clock;
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ni_m_series_clock = NI_M_ANALOG_TRIGGER_OUT_CLK;
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break;
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default:
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for (i = 0; i <= NI_M_MAX_RTSI_CHAN; ++i) {
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@ -704,13 +704,13 @@ static unsigned ni_m_series_clock_src_select(const struct ni_gpct *counter)
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Gi_Source_Select_Mask) >> Gi_Source_Select_Shift;
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switch (input_select) {
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case NI_M_Series_Timebase_1_Clock:
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case NI_M_TIMEBASE_1_CLK:
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clock_source = NI_GPCT_TIMEBASE_1_CLOCK_SRC_BITS;
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break;
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case NI_M_Series_Timebase_2_Clock:
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case NI_M_TIMEBASE_2_CLK:
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clock_source = NI_GPCT_TIMEBASE_2_CLOCK_SRC_BITS;
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break;
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case NI_M_Series_Timebase_3_Clock:
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case NI_M_TIMEBASE_3_CLK:
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if (counter_dev->regs[second_gate_reg] &
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Gi_Source_Subselect_Bit)
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clock_source =
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@ -718,20 +718,20 @@ static unsigned ni_m_series_clock_src_select(const struct ni_gpct *counter)
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else
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clock_source = NI_GPCT_TIMEBASE_3_CLOCK_SRC_BITS;
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break;
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case NI_M_Series_Logic_Low_Clock:
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case NI_M_LOGIC_LOW_CLK:
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clock_source = NI_GPCT_LOGIC_LOW_CLOCK_SRC_BITS;
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break;
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case NI_M_Series_Next_Gate_Clock:
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case NI_M_NEXT_GATE_CLK:
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if (counter_dev->regs[second_gate_reg] &
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Gi_Source_Subselect_Bit)
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clock_source = NI_GPCT_PXI_STAR_TRIGGER_CLOCK_SRC_BITS;
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else
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clock_source = NI_GPCT_NEXT_GATE_CLOCK_SRC_BITS;
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break;
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case NI_M_Series_PXI10_Clock:
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case NI_M_PXI10_CLK:
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clock_source = NI_GPCT_PXI10_CLOCK_SRC_BITS;
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break;
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case NI_M_Series_Next_TC_Clock:
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case NI_M_NEXT_TC_CLK:
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clock_source = NI_GPCT_NEXT_TC_CLOCK_SRC_BITS;
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break;
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default:
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