sfc: Merge sfe4001.c into falcon_boards.c
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Ben Hutchings
David S. Miller
parent
3473a5b118
commit
c9597d4f89
4 changed files with 420 additions and 443 deletions
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@ -1,6 +1,6 @@
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sfc-y += efx.o falcon.o tx.o rx.o falcon_gmac.o \
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sfc-y += efx.o falcon.o tx.o rx.o falcon_gmac.o \
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falcon_xmac.o selftest.o ethtool.o xfp_phy.o \
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falcon_xmac.o selftest.o ethtool.o xfp_phy.o \
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mdio_10g.o tenxpress.o falcon_boards.o sfe4001.o
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mdio_10g.o tenxpress.o falcon_boards.o
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sfc-$(CONFIG_SFC_MTD) += mtd.o
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sfc-$(CONFIG_SFC_MTD) += mtd.o
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obj-$(CONFIG_SFC) += sfc.o
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obj-$(CONFIG_SFC) += sfc.o
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@ -10,13 +10,6 @@
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#ifndef EFX_BOARDS_H
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#ifndef EFX_BOARDS_H
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#define EFX_BOARDS_H
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#define EFX_BOARDS_H
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#define FALCON_BOARD_SFE4001 0x01
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extern void falcon_probe_board(struct efx_nic *efx, u16 revision_info);
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extern void falcon_probe_board(struct efx_nic *efx, u16 revision_info);
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/* SFE4001 (10GBASE-T) */
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extern int sfe4001_init(struct efx_nic *efx);
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/* SFN4111T (100/1000/10GBASE-T) */
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extern int sfn4111t_init(struct efx_nic *efx);
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#endif
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#endif
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@ -7,10 +7,15 @@
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* by the Free Software Foundation, incorporated herein by reference.
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* by the Free Software Foundation, incorporated herein by reference.
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*/
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*/
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#include <linux/rtnetlink.h>
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#include "net_driver.h"
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#include "net_driver.h"
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#include "phy.h"
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#include "phy.h"
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#include "boards.h"
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#include "boards.h"
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#include "efx.h"
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#include "efx.h"
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#include "falcon.h"
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#include "falcon_hwdefs.h"
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#include "falcon_io.h"
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#include "workarounds.h"
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#include "workarounds.h"
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/* Macros for unpacking the board revision */
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/* Macros for unpacking the board revision */
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@ -20,6 +25,7 @@
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#define FALCON_BOARD_MINOR(_rev) (_rev & 0xf)
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#define FALCON_BOARD_MINOR(_rev) (_rev & 0xf)
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/* Board types */
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/* Board types */
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#define FALCON_BOARD_SFE4001 0x01
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#define FALCON_BOARD_SFE4002 0x02
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#define FALCON_BOARD_SFE4002 0x02
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#define FALCON_BOARD_SFN4111T 0x51
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#define FALCON_BOARD_SFN4111T 0x51
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#define FALCON_BOARD_SFN4112F 0x52
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#define FALCON_BOARD_SFN4112F 0x52
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@ -154,6 +160,419 @@ static inline int efx_check_lm87(struct efx_nic *efx, unsigned mask)
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#endif /* CONFIG_SENSORS_LM87 */
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#endif /* CONFIG_SENSORS_LM87 */
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/*****************************************************************************
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* Support for the SFE4001 and SFN4111T NICs.
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*
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* The SFE4001 does not power-up fully at reset due to its high power
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* consumption. We control its power via a PCA9539 I/O expander.
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* Both boards have a MAX6647 temperature monitor which we expose to
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* the lm90 driver.
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*
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* This also provides minimal support for reflashing the PHY, which is
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* initiated by resetting it with the FLASH_CFG_1 pin pulled down.
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* On SFE4001 rev A2 and later this is connected to the 3V3X output of
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* the IO-expander; on the SFN4111T it is connected to Falcon's GPIO3.
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* We represent reflash mode as PHY_MODE_SPECIAL and make it mutually
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* exclusive with the network device being open.
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*/
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/**************************************************************************
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* Support for I2C IO Expander device on SFE40001
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*/
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#define PCA9539 0x74
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#define P0_IN 0x00
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#define P0_OUT 0x02
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#define P0_INVERT 0x04
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#define P0_CONFIG 0x06
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#define P0_EN_1V0X_LBN 0
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#define P0_EN_1V0X_WIDTH 1
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#define P0_EN_1V2_LBN 1
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#define P0_EN_1V2_WIDTH 1
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#define P0_EN_2V5_LBN 2
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#define P0_EN_2V5_WIDTH 1
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#define P0_EN_3V3X_LBN 3
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#define P0_EN_3V3X_WIDTH 1
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#define P0_EN_5V_LBN 4
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#define P0_EN_5V_WIDTH 1
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#define P0_SHORTEN_JTAG_LBN 5
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#define P0_SHORTEN_JTAG_WIDTH 1
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#define P0_X_TRST_LBN 6
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#define P0_X_TRST_WIDTH 1
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#define P0_DSP_RESET_LBN 7
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#define P0_DSP_RESET_WIDTH 1
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#define P1_IN 0x01
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#define P1_OUT 0x03
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#define P1_INVERT 0x05
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#define P1_CONFIG 0x07
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#define P1_AFE_PWD_LBN 0
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#define P1_AFE_PWD_WIDTH 1
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#define P1_DSP_PWD25_LBN 1
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#define P1_DSP_PWD25_WIDTH 1
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#define P1_RESERVED_LBN 2
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#define P1_RESERVED_WIDTH 2
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#define P1_SPARE_LBN 4
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#define P1_SPARE_WIDTH 4
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/* Temperature Sensor */
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#define MAX664X_REG_RSL 0x02
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#define MAX664X_REG_WLHO 0x0B
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static void sfe4001_poweroff(struct efx_nic *efx)
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{
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struct i2c_client *ioexp_client = efx->board_info.ioexp_client;
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struct i2c_client *hwmon_client = efx->board_info.hwmon_client;
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/* Turn off all power rails and disable outputs */
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i2c_smbus_write_byte_data(ioexp_client, P0_OUT, 0xff);
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i2c_smbus_write_byte_data(ioexp_client, P1_CONFIG, 0xff);
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i2c_smbus_write_byte_data(ioexp_client, P0_CONFIG, 0xff);
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/* Clear any over-temperature alert */
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i2c_smbus_read_byte_data(hwmon_client, MAX664X_REG_RSL);
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}
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static int sfe4001_poweron(struct efx_nic *efx)
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{
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struct i2c_client *hwmon_client = efx->board_info.hwmon_client;
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struct i2c_client *ioexp_client = efx->board_info.ioexp_client;
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unsigned int i, j;
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int rc;
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u8 out;
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/* Clear any previous over-temperature alert */
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rc = i2c_smbus_read_byte_data(hwmon_client, MAX664X_REG_RSL);
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if (rc < 0)
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return rc;
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/* Enable port 0 and port 1 outputs on IO expander */
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rc = i2c_smbus_write_byte_data(ioexp_client, P0_CONFIG, 0x00);
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if (rc)
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return rc;
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rc = i2c_smbus_write_byte_data(ioexp_client, P1_CONFIG,
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0xff & ~(1 << P1_SPARE_LBN));
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if (rc)
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goto fail_on;
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/* If PHY power is on, turn it all off and wait 1 second to
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* ensure a full reset.
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*/
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rc = i2c_smbus_read_byte_data(ioexp_client, P0_OUT);
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if (rc < 0)
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goto fail_on;
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out = 0xff & ~((0 << P0_EN_1V2_LBN) | (0 << P0_EN_2V5_LBN) |
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(0 << P0_EN_3V3X_LBN) | (0 << P0_EN_5V_LBN) |
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(0 << P0_EN_1V0X_LBN));
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if (rc != out) {
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EFX_INFO(efx, "power-cycling PHY\n");
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rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);
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if (rc)
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goto fail_on;
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schedule_timeout_uninterruptible(HZ);
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}
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for (i = 0; i < 20; ++i) {
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/* Turn on 1.2V, 2.5V, 3.3V and 5V power rails */
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out = 0xff & ~((1 << P0_EN_1V2_LBN) | (1 << P0_EN_2V5_LBN) |
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(1 << P0_EN_3V3X_LBN) | (1 << P0_EN_5V_LBN) |
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(1 << P0_X_TRST_LBN));
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if (efx->phy_mode & PHY_MODE_SPECIAL)
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out |= 1 << P0_EN_3V3X_LBN;
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rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);
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if (rc)
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goto fail_on;
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msleep(10);
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/* Turn on 1V power rail */
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out &= ~(1 << P0_EN_1V0X_LBN);
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rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);
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if (rc)
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goto fail_on;
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EFX_INFO(efx, "waiting for DSP boot (attempt %d)...\n", i);
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/* In flash config mode, DSP does not turn on AFE, so
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* just wait 1 second.
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*/
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if (efx->phy_mode & PHY_MODE_SPECIAL) {
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schedule_timeout_uninterruptible(HZ);
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return 0;
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}
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for (j = 0; j < 10; ++j) {
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msleep(100);
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/* Check DSP has asserted AFE power line */
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rc = i2c_smbus_read_byte_data(ioexp_client, P1_IN);
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if (rc < 0)
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goto fail_on;
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if (rc & (1 << P1_AFE_PWD_LBN))
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return 0;
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}
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}
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EFX_INFO(efx, "timed out waiting for DSP boot\n");
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rc = -ETIMEDOUT;
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fail_on:
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sfe4001_poweroff(efx);
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return rc;
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}
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static int sfn4111t_reset(struct efx_nic *efx)
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{
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efx_oword_t reg;
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/* GPIO 3 and the GPIO register are shared with I2C, so block that */
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mutex_lock(&efx->i2c_adap.bus_lock);
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/* Pull RST_N (GPIO 2) low then let it up again, setting the
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* FLASH_CFG_1 strap (GPIO 3) appropriately. Only change the
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* output enables; the output levels should always be 0 (low)
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* and we rely on external pull-ups. */
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falcon_read(efx, ®, GPIO_CTL_REG_KER);
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EFX_SET_OWORD_FIELD(reg, GPIO2_OEN, true);
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falcon_write(efx, ®, GPIO_CTL_REG_KER);
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msleep(1000);
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EFX_SET_OWORD_FIELD(reg, GPIO2_OEN, false);
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EFX_SET_OWORD_FIELD(reg, GPIO3_OEN,
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!!(efx->phy_mode & PHY_MODE_SPECIAL));
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falcon_write(efx, ®, GPIO_CTL_REG_KER);
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msleep(1);
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mutex_unlock(&efx->i2c_adap.bus_lock);
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ssleep(1);
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return 0;
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}
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static ssize_t show_phy_flash_cfg(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
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return sprintf(buf, "%d\n", !!(efx->phy_mode & PHY_MODE_SPECIAL));
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}
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static ssize_t set_phy_flash_cfg(struct device *dev,
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struct device_attribute *attr,
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const char *buf, size_t count)
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{
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struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
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enum efx_phy_mode old_mode, new_mode;
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int err;
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rtnl_lock();
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old_mode = efx->phy_mode;
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if (count == 0 || *buf == '0')
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new_mode = old_mode & ~PHY_MODE_SPECIAL;
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else
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new_mode = PHY_MODE_SPECIAL;
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if (old_mode == new_mode) {
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err = 0;
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} else if (efx->state != STATE_RUNNING || netif_running(efx->net_dev)) {
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err = -EBUSY;
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} else {
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/* Reset the PHY, reconfigure the MAC and enable/disable
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* MAC stats accordingly. */
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efx->phy_mode = new_mode;
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if (new_mode & PHY_MODE_SPECIAL)
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efx_stats_disable(efx);
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if (efx->board_info.type == FALCON_BOARD_SFE4001)
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err = sfe4001_poweron(efx);
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else
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err = sfn4111t_reset(efx);
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efx_reconfigure_port(efx);
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if (!(new_mode & PHY_MODE_SPECIAL))
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efx_stats_enable(efx);
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}
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rtnl_unlock();
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return err ? err : count;
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}
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static DEVICE_ATTR(phy_flash_cfg, 0644, show_phy_flash_cfg, set_phy_flash_cfg);
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static void sfe4001_fini(struct efx_nic *efx)
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{
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EFX_INFO(efx, "%s\n", __func__);
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device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
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sfe4001_poweroff(efx);
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i2c_unregister_device(efx->board_info.ioexp_client);
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i2c_unregister_device(efx->board_info.hwmon_client);
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}
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static int sfe4001_check_hw(struct efx_nic *efx)
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{
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s32 status;
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/* If XAUI link is up then do not monitor */
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if (EFX_WORKAROUND_7884(efx) && efx->mac_up)
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return 0;
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/* Check the powered status of the PHY. Lack of power implies that
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* the MAX6647 has shut down power to it, probably due to a temp.
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* alarm. Reading the power status rather than the MAX6647 status
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* directly because the later is read-to-clear and would thus
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* start to power up the PHY again when polled, causing us to blip
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* the power undesirably.
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* We know we can read from the IO expander because we did
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* it during power-on. Assume failure now is bad news. */
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status = i2c_smbus_read_byte_data(efx->board_info.ioexp_client, P1_IN);
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if (status >= 0 &&
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(status & ((1 << P1_AFE_PWD_LBN) | (1 << P1_DSP_PWD25_LBN))) != 0)
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return 0;
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/* Use board power control, not PHY power control */
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sfe4001_poweroff(efx);
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efx->phy_mode = PHY_MODE_OFF;
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return (status < 0) ? -EIO : -ERANGE;
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}
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static struct i2c_board_info sfe4001_hwmon_info = {
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I2C_BOARD_INFO("max6647", 0x4e),
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};
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/* This board uses an I2C expander to provider power to the PHY, which needs to
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||||||
|
* be turned on before the PHY can be used.
|
||||||
|
* Context: Process context, rtnl lock held
|
||||||
|
*/
|
||||||
|
static int sfe4001_init(struct efx_nic *efx)
|
||||||
|
{
|
||||||
|
int rc;
|
||||||
|
|
||||||
|
#if defined(CONFIG_SENSORS_LM90) || defined(CONFIG_SENSORS_LM90_MODULE)
|
||||||
|
efx->board_info.hwmon_client =
|
||||||
|
i2c_new_device(&efx->i2c_adap, &sfe4001_hwmon_info);
|
||||||
|
#else
|
||||||
|
efx->board_info.hwmon_client =
|
||||||
|
i2c_new_dummy(&efx->i2c_adap, sfe4001_hwmon_info.addr);
|
||||||
|
#endif
|
||||||
|
if (!efx->board_info.hwmon_client)
|
||||||
|
return -EIO;
|
||||||
|
|
||||||
|
/* Raise board/PHY high limit from 85 to 90 degrees Celsius */
|
||||||
|
rc = i2c_smbus_write_byte_data(efx->board_info.hwmon_client,
|
||||||
|
MAX664X_REG_WLHO, 90);
|
||||||
|
if (rc)
|
||||||
|
goto fail_hwmon;
|
||||||
|
|
||||||
|
efx->board_info.ioexp_client = i2c_new_dummy(&efx->i2c_adap, PCA9539);
|
||||||
|
if (!efx->board_info.ioexp_client) {
|
||||||
|
rc = -EIO;
|
||||||
|
goto fail_hwmon;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* 10Xpress has fixed-function LED pins, so there is no board-specific
|
||||||
|
* blink code. */
|
||||||
|
efx->board_info.blink = tenxpress_phy_blink;
|
||||||
|
|
||||||
|
efx->board_info.monitor = sfe4001_check_hw;
|
||||||
|
efx->board_info.fini = sfe4001_fini;
|
||||||
|
|
||||||
|
if (efx->phy_mode & PHY_MODE_SPECIAL) {
|
||||||
|
/* PHY won't generate a 156.25 MHz clock and MAC stats fetch
|
||||||
|
* will fail. */
|
||||||
|
efx_stats_disable(efx);
|
||||||
|
}
|
||||||
|
rc = sfe4001_poweron(efx);
|
||||||
|
if (rc)
|
||||||
|
goto fail_ioexp;
|
||||||
|
|
||||||
|
rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
|
||||||
|
if (rc)
|
||||||
|
goto fail_on;
|
||||||
|
|
||||||
|
EFX_INFO(efx, "PHY is powered on\n");
|
||||||
|
return 0;
|
||||||
|
|
||||||
|
fail_on:
|
||||||
|
sfe4001_poweroff(efx);
|
||||||
|
fail_ioexp:
|
||||||
|
i2c_unregister_device(efx->board_info.ioexp_client);
|
||||||
|
fail_hwmon:
|
||||||
|
i2c_unregister_device(efx->board_info.hwmon_client);
|
||||||
|
return rc;
|
||||||
|
}
|
||||||
|
|
||||||
|
static int sfn4111t_check_hw(struct efx_nic *efx)
|
||||||
|
{
|
||||||
|
s32 status;
|
||||||
|
|
||||||
|
/* If XAUI link is up then do not monitor */
|
||||||
|
if (EFX_WORKAROUND_7884(efx) && efx->mac_up)
|
||||||
|
return 0;
|
||||||
|
|
||||||
|
/* Test LHIGH, RHIGH, FAULT, EOT and IOT alarms */
|
||||||
|
status = i2c_smbus_read_byte_data(efx->board_info.hwmon_client,
|
||||||
|
MAX664X_REG_RSL);
|
||||||
|
if (status < 0)
|
||||||
|
return -EIO;
|
||||||
|
if (status & 0x57)
|
||||||
|
return -ERANGE;
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
static void sfn4111t_fini(struct efx_nic *efx)
|
||||||
|
{
|
||||||
|
EFX_INFO(efx, "%s\n", __func__);
|
||||||
|
|
||||||
|
device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
|
||||||
|
i2c_unregister_device(efx->board_info.hwmon_client);
|
||||||
|
}
|
||||||
|
|
||||||
|
static struct i2c_board_info sfn4111t_a0_hwmon_info = {
|
||||||
|
I2C_BOARD_INFO("max6647", 0x4e),
|
||||||
|
};
|
||||||
|
|
||||||
|
static struct i2c_board_info sfn4111t_r5_hwmon_info = {
|
||||||
|
I2C_BOARD_INFO("max6646", 0x4d),
|
||||||
|
};
|
||||||
|
|
||||||
|
static int sfn4111t_init(struct efx_nic *efx)
|
||||||
|
{
|
||||||
|
int i = 0;
|
||||||
|
int rc;
|
||||||
|
|
||||||
|
efx->board_info.hwmon_client =
|
||||||
|
i2c_new_device(&efx->i2c_adap,
|
||||||
|
(efx->board_info.minor < 5) ?
|
||||||
|
&sfn4111t_a0_hwmon_info :
|
||||||
|
&sfn4111t_r5_hwmon_info);
|
||||||
|
if (!efx->board_info.hwmon_client)
|
||||||
|
return -EIO;
|
||||||
|
|
||||||
|
efx->board_info.blink = tenxpress_phy_blink;
|
||||||
|
efx->board_info.monitor = sfn4111t_check_hw;
|
||||||
|
efx->board_info.fini = sfn4111t_fini;
|
||||||
|
|
||||||
|
rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
|
||||||
|
if (rc)
|
||||||
|
goto fail_hwmon;
|
||||||
|
|
||||||
|
do {
|
||||||
|
if (efx->phy_mode & PHY_MODE_SPECIAL) {
|
||||||
|
/* PHY may not generate a 156.25 MHz clock and MAC
|
||||||
|
* stats fetch will fail. */
|
||||||
|
efx_stats_disable(efx);
|
||||||
|
sfn4111t_reset(efx);
|
||||||
|
}
|
||||||
|
rc = sft9001_wait_boot(efx);
|
||||||
|
if (rc == 0)
|
||||||
|
return 0;
|
||||||
|
efx->phy_mode = PHY_MODE_SPECIAL;
|
||||||
|
} while (rc == -EINVAL && ++i < 2);
|
||||||
|
|
||||||
|
device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
|
||||||
|
fail_hwmon:
|
||||||
|
i2c_unregister_device(efx->board_info.hwmon_client);
|
||||||
|
return rc;
|
||||||
|
}
|
||||||
|
|
||||||
/*****************************************************************************
|
/*****************************************************************************
|
||||||
* Support for the SFE4002
|
* Support for the SFE4002
|
||||||
*
|
*
|
||||||
|
|
|
||||||
|
|
@ -1,435 +0,0 @@
|
||||||
/****************************************************************************
|
|
||||||
* Driver for Solarflare Solarstorm network controllers and boards
|
|
||||||
* Copyright 2007-2008 Solarflare Communications Inc.
|
|
||||||
*
|
|
||||||
* This program is free software; you can redistribute it and/or modify it
|
|
||||||
* under the terms of the GNU General Public License version 2 as published
|
|
||||||
* by the Free Software Foundation, incorporated herein by reference.
|
|
||||||
*/
|
|
||||||
|
|
||||||
/*****************************************************************************
|
|
||||||
* Support for the SFE4001 and SFN4111T NICs.
|
|
||||||
*
|
|
||||||
* The SFE4001 does not power-up fully at reset due to its high power
|
|
||||||
* consumption. We control its power via a PCA9539 I/O expander.
|
|
||||||
* Both boards have a MAX6647 temperature monitor which we expose to
|
|
||||||
* the lm90 driver.
|
|
||||||
*
|
|
||||||
* This also provides minimal support for reflashing the PHY, which is
|
|
||||||
* initiated by resetting it with the FLASH_CFG_1 pin pulled down.
|
|
||||||
* On SFE4001 rev A2 and later this is connected to the 3V3X output of
|
|
||||||
* the IO-expander; on the SFN4111T it is connected to Falcon's GPIO3.
|
|
||||||
* We represent reflash mode as PHY_MODE_SPECIAL and make it mutually
|
|
||||||
* exclusive with the network device being open.
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include <linux/delay.h>
|
|
||||||
#include <linux/rtnetlink.h>
|
|
||||||
#include "net_driver.h"
|
|
||||||
#include "efx.h"
|
|
||||||
#include "phy.h"
|
|
||||||
#include "boards.h"
|
|
||||||
#include "falcon.h"
|
|
||||||
#include "falcon_hwdefs.h"
|
|
||||||
#include "falcon_io.h"
|
|
||||||
#include "mac.h"
|
|
||||||
#include "workarounds.h"
|
|
||||||
|
|
||||||
/**************************************************************************
|
|
||||||
*
|
|
||||||
* I2C IO Expander device
|
|
||||||
*
|
|
||||||
**************************************************************************/
|
|
||||||
#define PCA9539 0x74
|
|
||||||
|
|
||||||
#define P0_IN 0x00
|
|
||||||
#define P0_OUT 0x02
|
|
||||||
#define P0_INVERT 0x04
|
|
||||||
#define P0_CONFIG 0x06
|
|
||||||
|
|
||||||
#define P0_EN_1V0X_LBN 0
|
|
||||||
#define P0_EN_1V0X_WIDTH 1
|
|
||||||
#define P0_EN_1V2_LBN 1
|
|
||||||
#define P0_EN_1V2_WIDTH 1
|
|
||||||
#define P0_EN_2V5_LBN 2
|
|
||||||
#define P0_EN_2V5_WIDTH 1
|
|
||||||
#define P0_EN_3V3X_LBN 3
|
|
||||||
#define P0_EN_3V3X_WIDTH 1
|
|
||||||
#define P0_EN_5V_LBN 4
|
|
||||||
#define P0_EN_5V_WIDTH 1
|
|
||||||
#define P0_SHORTEN_JTAG_LBN 5
|
|
||||||
#define P0_SHORTEN_JTAG_WIDTH 1
|
|
||||||
#define P0_X_TRST_LBN 6
|
|
||||||
#define P0_X_TRST_WIDTH 1
|
|
||||||
#define P0_DSP_RESET_LBN 7
|
|
||||||
#define P0_DSP_RESET_WIDTH 1
|
|
||||||
|
|
||||||
#define P1_IN 0x01
|
|
||||||
#define P1_OUT 0x03
|
|
||||||
#define P1_INVERT 0x05
|
|
||||||
#define P1_CONFIG 0x07
|
|
||||||
|
|
||||||
#define P1_AFE_PWD_LBN 0
|
|
||||||
#define P1_AFE_PWD_WIDTH 1
|
|
||||||
#define P1_DSP_PWD25_LBN 1
|
|
||||||
#define P1_DSP_PWD25_WIDTH 1
|
|
||||||
#define P1_RESERVED_LBN 2
|
|
||||||
#define P1_RESERVED_WIDTH 2
|
|
||||||
#define P1_SPARE_LBN 4
|
|
||||||
#define P1_SPARE_WIDTH 4
|
|
||||||
|
|
||||||
/* Temperature Sensor */
|
|
||||||
#define MAX664X_REG_RSL 0x02
|
|
||||||
#define MAX664X_REG_WLHO 0x0B
|
|
||||||
|
|
||||||
static void sfe4001_poweroff(struct efx_nic *efx)
|
|
||||||
{
|
|
||||||
struct i2c_client *ioexp_client = efx->board_info.ioexp_client;
|
|
||||||
struct i2c_client *hwmon_client = efx->board_info.hwmon_client;
|
|
||||||
|
|
||||||
/* Turn off all power rails and disable outputs */
|
|
||||||
i2c_smbus_write_byte_data(ioexp_client, P0_OUT, 0xff);
|
|
||||||
i2c_smbus_write_byte_data(ioexp_client, P1_CONFIG, 0xff);
|
|
||||||
i2c_smbus_write_byte_data(ioexp_client, P0_CONFIG, 0xff);
|
|
||||||
|
|
||||||
/* Clear any over-temperature alert */
|
|
||||||
i2c_smbus_read_byte_data(hwmon_client, MAX664X_REG_RSL);
|
|
||||||
}
|
|
||||||
|
|
||||||
static int sfe4001_poweron(struct efx_nic *efx)
|
|
||||||
{
|
|
||||||
struct i2c_client *hwmon_client = efx->board_info.hwmon_client;
|
|
||||||
struct i2c_client *ioexp_client = efx->board_info.ioexp_client;
|
|
||||||
unsigned int i, j;
|
|
||||||
int rc;
|
|
||||||
u8 out;
|
|
||||||
|
|
||||||
/* Clear any previous over-temperature alert */
|
|
||||||
rc = i2c_smbus_read_byte_data(hwmon_client, MAX664X_REG_RSL);
|
|
||||||
if (rc < 0)
|
|
||||||
return rc;
|
|
||||||
|
|
||||||
/* Enable port 0 and port 1 outputs on IO expander */
|
|
||||||
rc = i2c_smbus_write_byte_data(ioexp_client, P0_CONFIG, 0x00);
|
|
||||||
if (rc)
|
|
||||||
return rc;
|
|
||||||
rc = i2c_smbus_write_byte_data(ioexp_client, P1_CONFIG,
|
|
||||||
0xff & ~(1 << P1_SPARE_LBN));
|
|
||||||
if (rc)
|
|
||||||
goto fail_on;
|
|
||||||
|
|
||||||
/* If PHY power is on, turn it all off and wait 1 second to
|
|
||||||
* ensure a full reset.
|
|
||||||
*/
|
|
||||||
rc = i2c_smbus_read_byte_data(ioexp_client, P0_OUT);
|
|
||||||
if (rc < 0)
|
|
||||||
goto fail_on;
|
|
||||||
out = 0xff & ~((0 << P0_EN_1V2_LBN) | (0 << P0_EN_2V5_LBN) |
|
|
||||||
(0 << P0_EN_3V3X_LBN) | (0 << P0_EN_5V_LBN) |
|
|
||||||
(0 << P0_EN_1V0X_LBN));
|
|
||||||
if (rc != out) {
|
|
||||||
EFX_INFO(efx, "power-cycling PHY\n");
|
|
||||||
rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);
|
|
||||||
if (rc)
|
|
||||||
goto fail_on;
|
|
||||||
schedule_timeout_uninterruptible(HZ);
|
|
||||||
}
|
|
||||||
|
|
||||||
for (i = 0; i < 20; ++i) {
|
|
||||||
/* Turn on 1.2V, 2.5V, 3.3V and 5V power rails */
|
|
||||||
out = 0xff & ~((1 << P0_EN_1V2_LBN) | (1 << P0_EN_2V5_LBN) |
|
|
||||||
(1 << P0_EN_3V3X_LBN) | (1 << P0_EN_5V_LBN) |
|
|
||||||
(1 << P0_X_TRST_LBN));
|
|
||||||
if (efx->phy_mode & PHY_MODE_SPECIAL)
|
|
||||||
out |= 1 << P0_EN_3V3X_LBN;
|
|
||||||
|
|
||||||
rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);
|
|
||||||
if (rc)
|
|
||||||
goto fail_on;
|
|
||||||
msleep(10);
|
|
||||||
|
|
||||||
/* Turn on 1V power rail */
|
|
||||||
out &= ~(1 << P0_EN_1V0X_LBN);
|
|
||||||
rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);
|
|
||||||
if (rc)
|
|
||||||
goto fail_on;
|
|
||||||
|
|
||||||
EFX_INFO(efx, "waiting for DSP boot (attempt %d)...\n", i);
|
|
||||||
|
|
||||||
/* In flash config mode, DSP does not turn on AFE, so
|
|
||||||
* just wait 1 second.
|
|
||||||
*/
|
|
||||||
if (efx->phy_mode & PHY_MODE_SPECIAL) {
|
|
||||||
schedule_timeout_uninterruptible(HZ);
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
for (j = 0; j < 10; ++j) {
|
|
||||||
msleep(100);
|
|
||||||
|
|
||||||
/* Check DSP has asserted AFE power line */
|
|
||||||
rc = i2c_smbus_read_byte_data(ioexp_client, P1_IN);
|
|
||||||
if (rc < 0)
|
|
||||||
goto fail_on;
|
|
||||||
if (rc & (1 << P1_AFE_PWD_LBN))
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
EFX_INFO(efx, "timed out waiting for DSP boot\n");
|
|
||||||
rc = -ETIMEDOUT;
|
|
||||||
fail_on:
|
|
||||||
sfe4001_poweroff(efx);
|
|
||||||
return rc;
|
|
||||||
}
|
|
||||||
|
|
||||||
static int sfn4111t_reset(struct efx_nic *efx)
|
|
||||||
{
|
|
||||||
efx_oword_t reg;
|
|
||||||
|
|
||||||
/* GPIO 3 and the GPIO register are shared with I2C, so block that */
|
|
||||||
mutex_lock(&efx->i2c_adap.bus_lock);
|
|
||||||
|
|
||||||
/* Pull RST_N (GPIO 2) low then let it up again, setting the
|
|
||||||
* FLASH_CFG_1 strap (GPIO 3) appropriately. Only change the
|
|
||||||
* output enables; the output levels should always be 0 (low)
|
|
||||||
* and we rely on external pull-ups. */
|
|
||||||
falcon_read(efx, ®, GPIO_CTL_REG_KER);
|
|
||||||
EFX_SET_OWORD_FIELD(reg, GPIO2_OEN, true);
|
|
||||||
falcon_write(efx, ®, GPIO_CTL_REG_KER);
|
|
||||||
msleep(1000);
|
|
||||||
EFX_SET_OWORD_FIELD(reg, GPIO2_OEN, false);
|
|
||||||
EFX_SET_OWORD_FIELD(reg, GPIO3_OEN,
|
|
||||||
!!(efx->phy_mode & PHY_MODE_SPECIAL));
|
|
||||||
falcon_write(efx, ®, GPIO_CTL_REG_KER);
|
|
||||||
msleep(1);
|
|
||||||
|
|
||||||
mutex_unlock(&efx->i2c_adap.bus_lock);
|
|
||||||
|
|
||||||
ssleep(1);
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
static ssize_t show_phy_flash_cfg(struct device *dev,
|
|
||||||
struct device_attribute *attr, char *buf)
|
|
||||||
{
|
|
||||||
struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
|
|
||||||
return sprintf(buf, "%d\n", !!(efx->phy_mode & PHY_MODE_SPECIAL));
|
|
||||||
}
|
|
||||||
|
|
||||||
static ssize_t set_phy_flash_cfg(struct device *dev,
|
|
||||||
struct device_attribute *attr,
|
|
||||||
const char *buf, size_t count)
|
|
||||||
{
|
|
||||||
struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
|
|
||||||
enum efx_phy_mode old_mode, new_mode;
|
|
||||||
int err;
|
|
||||||
|
|
||||||
rtnl_lock();
|
|
||||||
old_mode = efx->phy_mode;
|
|
||||||
if (count == 0 || *buf == '0')
|
|
||||||
new_mode = old_mode & ~PHY_MODE_SPECIAL;
|
|
||||||
else
|
|
||||||
new_mode = PHY_MODE_SPECIAL;
|
|
||||||
if (old_mode == new_mode) {
|
|
||||||
err = 0;
|
|
||||||
} else if (efx->state != STATE_RUNNING || netif_running(efx->net_dev)) {
|
|
||||||
err = -EBUSY;
|
|
||||||
} else {
|
|
||||||
/* Reset the PHY, reconfigure the MAC and enable/disable
|
|
||||||
* MAC stats accordingly. */
|
|
||||||
efx->phy_mode = new_mode;
|
|
||||||
if (new_mode & PHY_MODE_SPECIAL)
|
|
||||||
efx_stats_disable(efx);
|
|
||||||
if (efx->board_info.type == FALCON_BOARD_SFE4001)
|
|
||||||
err = sfe4001_poweron(efx);
|
|
||||||
else
|
|
||||||
err = sfn4111t_reset(efx);
|
|
||||||
efx_reconfigure_port(efx);
|
|
||||||
if (!(new_mode & PHY_MODE_SPECIAL))
|
|
||||||
efx_stats_enable(efx);
|
|
||||||
}
|
|
||||||
rtnl_unlock();
|
|
||||||
|
|
||||||
return err ? err : count;
|
|
||||||
}
|
|
||||||
|
|
||||||
static DEVICE_ATTR(phy_flash_cfg, 0644, show_phy_flash_cfg, set_phy_flash_cfg);
|
|
||||||
|
|
||||||
static void sfe4001_fini(struct efx_nic *efx)
|
|
||||||
{
|
|
||||||
EFX_INFO(efx, "%s\n", __func__);
|
|
||||||
|
|
||||||
device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
|
|
||||||
sfe4001_poweroff(efx);
|
|
||||||
i2c_unregister_device(efx->board_info.ioexp_client);
|
|
||||||
i2c_unregister_device(efx->board_info.hwmon_client);
|
|
||||||
}
|
|
||||||
|
|
||||||
static int sfe4001_check_hw(struct efx_nic *efx)
|
|
||||||
{
|
|
||||||
s32 status;
|
|
||||||
|
|
||||||
/* If XAUI link is up then do not monitor */
|
|
||||||
if (EFX_WORKAROUND_7884(efx) && efx->mac_up)
|
|
||||||
return 0;
|
|
||||||
|
|
||||||
/* Check the powered status of the PHY. Lack of power implies that
|
|
||||||
* the MAX6647 has shut down power to it, probably due to a temp.
|
|
||||||
* alarm. Reading the power status rather than the MAX6647 status
|
|
||||||
* directly because the later is read-to-clear and would thus
|
|
||||||
* start to power up the PHY again when polled, causing us to blip
|
|
||||||
* the power undesirably.
|
|
||||||
* We know we can read from the IO expander because we did
|
|
||||||
* it during power-on. Assume failure now is bad news. */
|
|
||||||
status = i2c_smbus_read_byte_data(efx->board_info.ioexp_client, P1_IN);
|
|
||||||
if (status >= 0 &&
|
|
||||||
(status & ((1 << P1_AFE_PWD_LBN) | (1 << P1_DSP_PWD25_LBN))) != 0)
|
|
||||||
return 0;
|
|
||||||
|
|
||||||
/* Use board power control, not PHY power control */
|
|
||||||
sfe4001_poweroff(efx);
|
|
||||||
efx->phy_mode = PHY_MODE_OFF;
|
|
||||||
|
|
||||||
return (status < 0) ? -EIO : -ERANGE;
|
|
||||||
}
|
|
||||||
|
|
||||||
static struct i2c_board_info sfe4001_hwmon_info = {
|
|
||||||
I2C_BOARD_INFO("max6647", 0x4e),
|
|
||||||
};
|
|
||||||
|
|
||||||
/* This board uses an I2C expander to provider power to the PHY, which needs to
|
|
||||||
* be turned on before the PHY can be used.
|
|
||||||
* Context: Process context, rtnl lock held
|
|
||||||
*/
|
|
||||||
int sfe4001_init(struct efx_nic *efx)
|
|
||||||
{
|
|
||||||
int rc;
|
|
||||||
|
|
||||||
#if defined(CONFIG_SENSORS_LM90) || defined(CONFIG_SENSORS_LM90_MODULE)
|
|
||||||
efx->board_info.hwmon_client =
|
|
||||||
i2c_new_device(&efx->i2c_adap, &sfe4001_hwmon_info);
|
|
||||||
#else
|
|
||||||
efx->board_info.hwmon_client =
|
|
||||||
i2c_new_dummy(&efx->i2c_adap, sfe4001_hwmon_info.addr);
|
|
||||||
#endif
|
|
||||||
if (!efx->board_info.hwmon_client)
|
|
||||||
return -EIO;
|
|
||||||
|
|
||||||
/* Raise board/PHY high limit from 85 to 90 degrees Celsius */
|
|
||||||
rc = i2c_smbus_write_byte_data(efx->board_info.hwmon_client,
|
|
||||||
MAX664X_REG_WLHO, 90);
|
|
||||||
if (rc)
|
|
||||||
goto fail_hwmon;
|
|
||||||
|
|
||||||
efx->board_info.ioexp_client = i2c_new_dummy(&efx->i2c_adap, PCA9539);
|
|
||||||
if (!efx->board_info.ioexp_client) {
|
|
||||||
rc = -EIO;
|
|
||||||
goto fail_hwmon;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* 10Xpress has fixed-function LED pins, so there is no board-specific
|
|
||||||
* blink code. */
|
|
||||||
efx->board_info.blink = tenxpress_phy_blink;
|
|
||||||
|
|
||||||
efx->board_info.monitor = sfe4001_check_hw;
|
|
||||||
efx->board_info.fini = sfe4001_fini;
|
|
||||||
|
|
||||||
if (efx->phy_mode & PHY_MODE_SPECIAL) {
|
|
||||||
/* PHY won't generate a 156.25 MHz clock and MAC stats fetch
|
|
||||||
* will fail. */
|
|
||||||
efx_stats_disable(efx);
|
|
||||||
}
|
|
||||||
rc = sfe4001_poweron(efx);
|
|
||||||
if (rc)
|
|
||||||
goto fail_ioexp;
|
|
||||||
|
|
||||||
rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
|
|
||||||
if (rc)
|
|
||||||
goto fail_on;
|
|
||||||
|
|
||||||
EFX_INFO(efx, "PHY is powered on\n");
|
|
||||||
return 0;
|
|
||||||
|
|
||||||
fail_on:
|
|
||||||
sfe4001_poweroff(efx);
|
|
||||||
fail_ioexp:
|
|
||||||
i2c_unregister_device(efx->board_info.ioexp_client);
|
|
||||||
fail_hwmon:
|
|
||||||
i2c_unregister_device(efx->board_info.hwmon_client);
|
|
||||||
return rc;
|
|
||||||
}
|
|
||||||
|
|
||||||
static int sfn4111t_check_hw(struct efx_nic *efx)
|
|
||||||
{
|
|
||||||
s32 status;
|
|
||||||
|
|
||||||
/* If XAUI link is up then do not monitor */
|
|
||||||
if (EFX_WORKAROUND_7884(efx) && efx->mac_up)
|
|
||||||
return 0;
|
|
||||||
|
|
||||||
/* Test LHIGH, RHIGH, FAULT, EOT and IOT alarms */
|
|
||||||
status = i2c_smbus_read_byte_data(efx->board_info.hwmon_client,
|
|
||||||
MAX664X_REG_RSL);
|
|
||||||
if (status < 0)
|
|
||||||
return -EIO;
|
|
||||||
if (status & 0x57)
|
|
||||||
return -ERANGE;
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
static void sfn4111t_fini(struct efx_nic *efx)
|
|
||||||
{
|
|
||||||
EFX_INFO(efx, "%s\n", __func__);
|
|
||||||
|
|
||||||
device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
|
|
||||||
i2c_unregister_device(efx->board_info.hwmon_client);
|
|
||||||
}
|
|
||||||
|
|
||||||
static struct i2c_board_info sfn4111t_a0_hwmon_info = {
|
|
||||||
I2C_BOARD_INFO("max6647", 0x4e),
|
|
||||||
};
|
|
||||||
|
|
||||||
static struct i2c_board_info sfn4111t_r5_hwmon_info = {
|
|
||||||
I2C_BOARD_INFO("max6646", 0x4d),
|
|
||||||
};
|
|
||||||
|
|
||||||
int sfn4111t_init(struct efx_nic *efx)
|
|
||||||
{
|
|
||||||
int i = 0;
|
|
||||||
int rc;
|
|
||||||
|
|
||||||
efx->board_info.hwmon_client =
|
|
||||||
i2c_new_device(&efx->i2c_adap,
|
|
||||||
(efx->board_info.minor < 5) ?
|
|
||||||
&sfn4111t_a0_hwmon_info :
|
|
||||||
&sfn4111t_r5_hwmon_info);
|
|
||||||
if (!efx->board_info.hwmon_client)
|
|
||||||
return -EIO;
|
|
||||||
|
|
||||||
efx->board_info.blink = tenxpress_phy_blink;
|
|
||||||
efx->board_info.monitor = sfn4111t_check_hw;
|
|
||||||
efx->board_info.fini = sfn4111t_fini;
|
|
||||||
|
|
||||||
rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
|
|
||||||
if (rc)
|
|
||||||
goto fail_hwmon;
|
|
||||||
|
|
||||||
do {
|
|
||||||
if (efx->phy_mode & PHY_MODE_SPECIAL) {
|
|
||||||
/* PHY may not generate a 156.25 MHz clock and MAC
|
|
||||||
* stats fetch will fail. */
|
|
||||||
efx_stats_disable(efx);
|
|
||||||
sfn4111t_reset(efx);
|
|
||||||
}
|
|
||||||
rc = sft9001_wait_boot(efx);
|
|
||||||
if (rc == 0)
|
|
||||||
return 0;
|
|
||||||
efx->phy_mode = PHY_MODE_SPECIAL;
|
|
||||||
} while (rc == -EINVAL && ++i < 2);
|
|
||||||
|
|
||||||
device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
|
|
||||||
fail_hwmon:
|
|
||||||
i2c_unregister_device(efx->board_info.hwmon_client);
|
|
||||||
return rc;
|
|
||||||
}
|
|
||||||
Loading…
Add table
Reference in a new issue