evie/android_kernel_oneplus_msm8998
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drm/msm: deal with arbitrary # of cmd buffers

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For some optimizations coming on the userspace side, splitting larger
draw or gmem cmds into multiple cmdstream buffers, we need to support
much more than the previous small/arbitrary limit.

Change-Id: Ic0dedbad2f79156f4e6c9f70c8e27cd5fff9acdb
Signed-off-by: Rob Clark <robdclark@gmail.com>
Git-commit: 6b597ce2f7c7a0f8116d753902db9aba6bc05cb0
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
[jcrouse@codeaurora.org: fix some merge conflicts]
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
This commit is contained in:
Rob Clark 2017-05-04 13:48:23 -06:00 • committed by Jordan Crouse
parent f88d0c4524
commit c9d1b0f37a
3 changed files with 9 additions and 18 deletions
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11
drivers/gpu/drm/msm/adreno/adreno_gpu.c
View file

@ -176,7 +176,7 @@ int adreno_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit)
{
struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
struct msm_ringbuffer *ring = gpu->rb[submit->ring];
unsigned i, ibs = 0;
unsigned i;
for (i = 0; i < submit->nr_cmds; i++) {
switch (submit->cmd[i].type) {
@ -191,18 +191,11 @@ int adreno_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit)
CP_INDIRECT_BUFFER_PFE : CP_INDIRECT_BUFFER_PFD, 2);
OUT_RING(ring, lower_32_bits(submit->cmd[i].iova));
OUT_RING(ring, submit->cmd[i].size);
ibs++;
OUT_PKT2(ring);
break;
}
}
/* on a320, at least, we seem to need to pad things out to an
* even number of qwords to avoid issue w/ CP hanging on wrap-
* around:
*/
if (ibs % 2)
OUT_PKT2(ring);
OUT_PKT0(ring, REG_AXXX_CP_SCRATCH_REG2, 1);
OUT_RING(ring, submit->fence);

4
drivers/gpu/drm/msm/msm_gem.h
View file

@ -101,8 +101,6 @@ static inline uint32_t msm_gem_fence(struct msm_gem_object *msm_obj,
return fence;
}
#define MAX_CMDS 4
/* Created per submit-ioctl, to track bo's and cmdstream bufs, etc,
* associated with the cmdstream submission for synchronization (and
* make it easier to unwind when things go wrong, etc). This only
@ -127,7 +125,7 @@ struct msm_gem_submit {
uint32_t size; /* in dwords */
uint64_t iova;
uint32_t idx; /* cmdstream buffer idx in bos[] */
} cmd[MAX_CMDS];
} *cmd; /* array of size nr_cmds */
struct {
uint32_t flags;
struct msm_gem_object *obj;

12
drivers/gpu/drm/msm/msm_gem_submit.c
View file

@ -34,10 +34,11 @@ static inline void __user *to_user_ptr(u64 address)
}
static struct msm_gem_submit *submit_create(struct drm_device *dev,
struct msm_gem_address_space *aspace, int nr)
struct msm_gem_address_space *aspace, int nr_bos, int nr_cmds)
{
struct msm_gem_submit *submit;
int sz = sizeof(*submit) + (nr * sizeof(submit->bos[0]));
int sz = sizeof(*submit) + (nr_bos * sizeof(submit->bos[0])) +
(nr_cmds * sizeof(*submit->cmd));
submit = kmalloc(sz, GFP_TEMPORARY | __GFP_NOWARN | __GFP_NORETRY);
if (submit) {
@ -50,6 +51,8 @@ static struct msm_gem_submit *submit_create(struct drm_device *dev,
submit->profile_buf_vaddr = NULL;
submit->profile_buf_iova = 0;
submit->cmd = (void *)&submit->bos[nr_bos];
submit->secure = false;
INIT_LIST_HEAD(&submit->bo_list);
@ -393,12 +396,9 @@ int msm_ioctl_gem_submit(struct drm_device *dev, void *data,
if (!gpu)
return -ENXIO;
if (args->nr_cmds > MAX_CMDS)
return -EINVAL;
mutex_lock(&dev->struct_mutex);
submit = submit_create(dev, ctx->aspace, args->nr_bos);
submit = submit_create(dev, ctx->aspace, args->nr_bos, args->nr_cmds);
if (!submit) {
ret = -ENOMEM;
goto out;