From cb84e2692b673f5455b192634f9cbb458056948d Mon Sep 17 00:00:00 2001 From: Vivek Kumar Date: Thu, 3 May 2018 14:02:43 +0530 Subject: [PATCH] ARM: dts: msm: Configure irq flag for blsp_uart2 in 8996 gvm Configure irq flag as level high for blsp_uart2 wake-up interrupt in msm8996 gvm. Change-Id: I028ea5ea36da2a97c6878b763fcde1ebbbed9847 Signed-off-by: Vivek Kumar --- arch/arm/boot/dts/qcom/vplatform-lfv-msm8996-blsp.dtsi | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/qcom/vplatform-lfv-msm8996-blsp.dtsi b/arch/arm/boot/dts/qcom/vplatform-lfv-msm8996-blsp.dtsi index 61b48802540a..514bf45aa0a6 100644 --- a/arch/arm/boot/dts/qcom/vplatform-lfv-msm8996-blsp.dtsi +++ b/arch/arm/boot/dts/qcom/vplatform-lfv-msm8996-blsp.dtsi @@ -10,6 +10,8 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ +#include + / { aliases { spi9 = &spi_9; @@ -94,7 +96,7 @@ <0x7544000 0x2b000>; reg-names = "core_mem", "bam_mem"; interrupt-names = "core_irq", "bam_irq", "wakeup_irq"; - interrupts = <0 108 0>, <0 238 0>, <0 810 0>; + interrupts = <0 108 0>, <0 238 0>, <0 810 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <0>; qcom,inject-rx-on-wakeup;