evie/android_kernel_oneplus_msm8998
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wil6210: enable WA for PCIe HW errata

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WA for HW errata for PCIe in MSM8998 v1, QCTDD02664351.
Due to this issue, PCIe write ordering rule may be violated
causing cluster to read older data from its L2 cache, in specific
scenario.

To avoid that for wil6210 rx transactions, we set "no snoop" for
PCIe wr transactions (from device to host).
For configuring the above bit 4 of 0x8812C4 register is set.

Signed-off-by: Maya Erez <merez@codeaurora.org>
This commit is contained in:
Maya Erez 2016-02-28 09:52:25 +02:00 • committed by David Keitel
parent faab237c9c
commit cd958296ac
2 changed files with 7 additions and 0 deletions
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4
drivers/net/wireless/ath/wil6210/main.c
View file

@ -621,6 +621,10 @@ static int wil_target_reset(struct wil6210_priv *wil)
wil_s(wil, RGF_DMA_OFUL_NID_0, BIT_DMA_OFUL_NID_0_RX_EXT_TR_EN |
BIT_DMA_OFUL_NID_0_RX_EXT_A3_SRC);
/* Enable fix for PCIe HW bug, set "No snoop" for RX transactions */
wil_s(wil, RGF_DMA_PEDI_DIF, BIT_DMA_WR_CMD_ATTR_NO_SNOOP |
BIT_DMA_WR_CMD_ATTR_RELAXED_ORDERING);
wil_dbg_misc(wil, "Reset completed in %d ms\n", delay * RST_DELAY);
return 0;
}

3
drivers/net/wireless/ath/wil6210/wil6210.h
View file

@ -156,6 +156,9 @@ struct RGF_ICR {
#define RGF_USER_SPARROW_M_4 (0x880c50) /* Sparrow */
#define BIT_SPARROW_M_4_SEL_SLEEP_OR_REF BIT(2)
#define RGF_DMA_PEDI_DIF (0x8812C4) /* struct RGF_PEDI_DIF */
#define BIT_DMA_WR_CMD_ATTR_NO_SNOOP BIT(4)
#define BIT_DMA_WR_CMD_ATTR_RELAXED_ORDERING BIT(5)
#define RGF_DMA_EP_TX_ICR (0x881bb4) /* struct RGF_ICR */
#define BIT_DMA_EP_TX_ICR_TX_DONE BIT(0)
#define BIT_DMA_EP_TX_ICR_TX_DONE_N(n) BIT(n+1) /* n = [0..23] */