From 256de04b8de29c89f91ad1eba1e7522d3ac9177d Mon Sep 17 00:00:00 2001 From: Lokesh Batra Date: Wed, 23 Mar 2016 11:59:12 -0700 Subject: [PATCH 1/2] msm: kgsl: Add trace ID support for graphics coresight Add the support for trace ID for coresight. This ID is will be defined in the respective device tree file. Change-Id: I78ba05ed05b54fdc0f4d4f55c468f90f39c821f1 Signed-off-by: Lokesh Batra Signed-off-by: Harshdeep Dhatt --- Documentation/devicetree/bindings/gpu/adreno.txt | 2 +- drivers/gpu/msm/adreno.h | 2 ++ drivers/gpu/msm/adreno_coresight.c | 12 ++++++++++++ 3 files changed, 15 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/gpu/adreno.txt b/Documentation/devicetree/bindings/gpu/adreno.txt index 8a79626125d9..f5ae85d27692 100644 --- a/Documentation/devicetree/bindings/gpu/adreno.txt +++ b/Documentation/devicetree/bindings/gpu/adreno.txt @@ -187,7 +187,7 @@ Documentation/devicetree/bindings/coresight/coresight.txt - coresight-child-list List of phandles pointing to the children of this component. - coresight-child-ports List of input port numbers of the children. - +- coresight-atid The unique ATID value of the coresight device Example of A330 GPU in MSM8916: diff --git a/drivers/gpu/msm/adreno.h b/drivers/gpu/msm/adreno.h index 1c30b43fdfcf..2c8345aadc07 100644 --- a/drivers/gpu/msm/adreno.h +++ b/drivers/gpu/msm/adreno.h @@ -676,11 +676,13 @@ ssize_t adreno_coresight_store_register(struct device *dev, * @registers - Array of GPU specific registers to configure trace bus output * @count - Number of registers in the array * @groups - Pointer to an attribute list of control files + * @atid - The unique ATID value of the coresight device */ struct adreno_coresight { struct adreno_coresight_register *registers; unsigned int count; const struct attribute_group **groups; + unsigned int atid; }; diff --git a/drivers/gpu/msm/adreno_coresight.c b/drivers/gpu/msm/adreno_coresight.c index 02a39278ccb3..901e2144c6d8 100644 --- a/drivers/gpu/msm/adreno_coresight.c +++ b/drivers/gpu/msm/adreno_coresight.c @@ -200,6 +200,9 @@ static int _adreno_coresight_set(struct adreno_device *adreno_dev) kgsl_regwrite(device, coresight->registers[i].offset, coresight->registers[i].value); + kgsl_property_read_u32(device, "coresight-atid", + (unsigned int *)&(coresight->atid)); + return 0; } /** @@ -281,7 +284,16 @@ void adreno_coresight_start(struct adreno_device *adreno_dev) _adreno_coresight_set(adreno_dev); } +static int adreno_coresight_trace_id(struct coresight_device *csdev) +{ + struct kgsl_device *device = dev_get_drvdata(csdev->dev.parent); + struct adreno_gpudev *gpudev = ADRENO_GPU_DEVICE(ADRENO_DEVICE(device)); + + return gpudev->coresight->atid; +} + static const struct coresight_ops_source adreno_coresight_source_ops = { + .trace_id = adreno_coresight_trace_id, .enable = adreno_coresight_enable, .disable = adreno_coresight_disable, }; From ac4034d803e0adee0dfa826fadf607f6bf4d148d Mon Sep 17 00:00:00 2001 From: Lokesh Batra Date: Tue, 8 Mar 2016 05:40:03 -0800 Subject: [PATCH 2/2] ARM: dts: msm: Add GPU coresight properties for msm8998 Add properties in the GPU device tree for coresight. Define GPU name and its funnel connections. CR-fixed: 988516 Change-Id: Ibf2e369c2a4732ebc7471ee103bc8d5d934247ec Signed-off-by: Lokesh Batra --- arch/arm/boot/dts/qcom/msm8998-coresight.dtsi | 8 ++++++++ arch/arm/boot/dts/qcom/msm8998-gpu.dtsi | 8 ++++++++ 2 files changed, 16 insertions(+) diff --git a/arch/arm/boot/dts/qcom/msm8998-coresight.dtsi b/arch/arm/boot/dts/qcom/msm8998-coresight.dtsi index aeb6bf6141d8..75a90b0499e1 100644 --- a/arch/arm/boot/dts/qcom/msm8998-coresight.dtsi +++ b/arch/arm/boot/dts/qcom/msm8998-coresight.dtsi @@ -277,6 +277,14 @@ <&funnel_apss_merg_out_funnel_in1>; }; }; + port@6 { + reg = <7>; + funnel_in1_in_gfx: endpoint { + slave-mode; + remote-endpoint = + <&gfx_out_funnel_in1>; + }; + }; }; }; diff --git a/arch/arm/boot/dts/qcom/msm8998-gpu.dtsi b/arch/arm/boot/dts/qcom/msm8998-gpu.dtsi index 8739e8f22549..c85493d54e35 100644 --- a/arch/arm/boot/dts/qcom/msm8998-gpu.dtsi +++ b/arch/arm/boot/dts/qcom/msm8998-gpu.dtsi @@ -122,6 +122,14 @@ vddcx-supply = <&gdsc_gpu_cx>; vdd-supply = <&gdsc_gpu_gx>; + /* Trace bus */ + coresight-name = "coresight-gfx"; + port { + gfx_out_funnel_in1: endpoint { + remote-endpoint = <&funnel_in1_in_gfx>; + }; + }; + /* GPU Mempools */ qcom,gpu-mempools { #address-cells= <1>;