From d375ea2d637d038bdd45a00ac0e81b8dc03ff3fd Mon Sep 17 00:00:00 2001
From: Dhoat Harpal <hdhoat@codeaurora.org>
Date: Mon, 27 Jun 2016 14:41:03 +0530
Subject: [PATCH] ARM: dts: msm: Add SMEM entry for MSMFALCON

Add the SMEM entry to enable the use of shared memory by different
processors in the SoC.

CRs-Fixed: 1043377
Change-Id: Ic36a67c724d7f8a0e64affba92856160cce914bb
Signed-off-by: Dhoat Harpal <hdhoat@codeaurora.org>
---
 arch/arm/boot/dts/qcom/msmfalcon.dtsi | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm/boot/dts/qcom/msmfalcon.dtsi b/arch/arm/boot/dts/qcom/msmfalcon.dtsi
index 562dc875d46c..733779db77dd 100644
--- a/arch/arm/boot/dts/qcom/msmfalcon.dtsi
+++ b/arch/arm/boot/dts/qcom/msmfalcon.dtsi
@@ -257,4 +257,15 @@
 		reg = <0x1f40000 0x8000>;
 		qcom,num-locks = <8>;
 	};
+
+	qcom,smem@86000000 {
+		compatible = "qcom,smem";
+		reg = <0x86000000 0x200000>,
+			<0x17911008 0x4>,
+			<0x778000 0x7000>,
+			<0x1fd4000 0x8>;
+		reg-names = "smem", "irq-reg-base", "aux-mem1",
+			"smem_targ_info_reg";
+		qcom,mpu-enabled;
+	};
 };