mhi: core: Enable correct channel alignment
Enable correct allignment of MHI channels to the ring size rounded up to the next power of two as per device requirement. Change-Id: Ic77c43fdbcde2ec3b6f08e3062eaf778eb13ec5b Signed-off-by: Andrei Danaila <adanaila@codeaurora.org> Signed-off-by: Tony Truong <truong@codeaurora.org>
This commit is contained in:
Tony Truong
David Keitel
parent
6ad91fea76
commit
d3d1144ee5
3 changed files with 100 additions and 81 deletions
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@ -71,9 +71,8 @@ ev_mutex_free:
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size_t calculate_mhi_space(struct mhi_device_ctxt *mhi_dev_ctxt)
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{
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int i, r;
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int i = 0;
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size_t mhi_dev_mem = 0;
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struct mhi_chan_info chan_info;
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/* Calculate size needed for contexts */
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mhi_dev_mem += (MHI_MAX_CHANNELS * sizeof(struct mhi_chan_ctxt)) +
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@ -90,23 +89,6 @@ size_t calculate_mhi_space(struct mhi_device_ctxt *mhi_dev_ctxt)
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mhi_dev_mem += (sizeof(union mhi_event_pkt) *
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mhi_dev_ctxt->ev_ring_props[i].nr_desc);
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/* Calculate size needed for xfer TREs and bounce buffers */
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for (i = 0; i < MHI_MAX_CHANNELS; ++i)
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if (VALID_CHAN_NR(i)) {
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r = get_chan_props(mhi_dev_ctxt, i, &chan_info);
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if (r)
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continue;
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/* Add size of TREs */
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mhi_dev_mem += (sizeof(union mhi_xfer_pkt) *
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chan_info.max_desc);
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/* Add bounce buffer size */
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if (mhi_dev_ctxt->flags.bb_enabled) {
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mhi_log(MHI_MSG_INFO,
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"Enabling BB list, chan %d\n", i);
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/*mhi_dev_mem += (MAX_BOUNCE_BUF_SIZE *
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chan_info.max_desc); */
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}
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}
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mhi_log(MHI_MSG_INFO, "Final bytes for MHI device space %zd\n",
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mhi_dev_mem);
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return mhi_dev_mem;
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@ -201,20 +183,6 @@ static int mhi_cmd_ring_init(struct mhi_cmd_ctxt *cmd_ctxt,
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return 0;
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}
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static int enable_bb_ctxt(struct mhi_ring *bb_ctxt, int nr_el)
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{
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bb_ctxt->el_size = sizeof(struct mhi_buf_info);
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bb_ctxt->len = bb_ctxt->el_size * nr_el;
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bb_ctxt->base = kzalloc(bb_ctxt->len, GFP_KERNEL);
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bb_ctxt->wp = bb_ctxt->base;
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bb_ctxt->rp = bb_ctxt->base;
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bb_ctxt->ack_rp = bb_ctxt->base;
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if (!bb_ctxt->base)
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return -ENOMEM;
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return 0;
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}
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/*
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* The device can have severe addressing limitations, and in this case
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* the MHI driver may be restricted on where memory can be allocated.
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@ -311,7 +279,7 @@ int init_mhi_dev_mem(struct mhi_device_ctxt *mhi_dev_ctxt)
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calculate_mhi_space(mhi_dev_ctxt);
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mhi_dev_ctxt->dev_space.dev_mem_start =
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dma_alloc_coherent(&mhi_dev_ctxt->dev_info->plat_dev->dev,
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dma_alloc_coherent(&mhi_dev_ctxt->dev_info->pcie_device->dev,
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mhi_dev_ctxt->dev_space.dev_mem_len,
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&mhi_dev_ctxt->dev_space.dma_dev_mem_start,
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GFP_KERNEL);
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@ -392,49 +360,9 @@ int init_mhi_dev_mem(struct mhi_device_ctxt *mhi_dev_ctxt)
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(u64)dma_dev_mem_start + mhi_mem_index);
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mhi_mem_index += ring_len;
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}
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/* Initialize both the local and device xfer contexts */
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for (i = 0; i < MHI_MAX_CHANNELS; ++i)
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if (VALID_CHAN_NR(i)) {
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struct mhi_chan_info chan_info;
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r = get_chan_props(mhi_dev_ctxt, i, &chan_info);
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if (r)
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continue;
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mhi_log(MHI_MSG_INFO, "Initializing chan ctxt %d\n", i);
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ring_len = (sizeof(union mhi_xfer_pkt) *
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chan_info.max_desc);
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init_dev_chan_ctxt(
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&mhi_dev_ctxt->dev_space.ring_ctxt.cc_list[i],
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dma_dev_mem_start + mhi_mem_index,
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ring_len, chan_info.ev_ring);
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/* TODO: May not need to do this. It would be best for
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* the client to set it during chan open */
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mhi_dev_ctxt->dev_space.ring_ctxt.cc_list[i].
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mhi_chan_type = (i % 2) + 1;
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init_local_chan_ctxt(
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&mhi_dev_ctxt->mhi_local_chan_ctxt[i],
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dev_mem_start + mhi_mem_index,
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ring_len);
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/* TODO: May not need to do this. It would be best for
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* the client to set it during chan open */
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mhi_dev_ctxt->mhi_local_chan_ctxt[i].dir = (i % 2) + 1;
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/* Add size of TREs */
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mhi_mem_index += ring_len;
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if (mhi_dev_ctxt->flags.bb_enabled) {
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r = enable_bb_ctxt(
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&mhi_dev_ctxt->chan_bb_list[i],
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chan_info.max_desc);
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if (r)
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goto error_during_bb_list;
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}
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}
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return 0;
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error_during_bb_list:
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for (; i >= 0; --i)
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kfree(mhi_dev_ctxt->chan_bb_list[i].base);
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dma_free_coherent(&mhi_dev_ctxt->dev_info->plat_dev->dev,
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dma_free_coherent(&mhi_dev_ctxt->dev_info->pcie_device->dev,
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mhi_dev_ctxt->dev_space.dev_mem_len,
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mhi_dev_ctxt->dev_space.dev_mem_start,
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mhi_dev_ctxt->dev_space.dma_dev_mem_start);
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@ -629,7 +557,7 @@ error_during_thread_init:
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kfree(mhi_dev_ctxt->mhi_ev_wq.m3_event);
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kfree(mhi_dev_ctxt->mhi_ev_wq.bhi_event);
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error_wq_init:
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dma_free_coherent(&mhi_dev_ctxt->dev_info->plat_dev->dev,
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dma_free_coherent(&mhi_dev_ctxt->dev_info->pcie_device->dev,
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mhi_dev_ctxt->dev_space.dev_mem_len,
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mhi_dev_ctxt->dev_space.dev_mem_start,
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mhi_dev_ctxt->dev_space.dma_dev_mem_start);
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@ -29,6 +29,19 @@
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#include "mhi_macros.h"
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#include "mhi_trace.h"
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static int enable_bb_ctxt(struct mhi_ring *bb_ctxt, int nr_el)
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{
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bb_ctxt->el_size = sizeof(struct mhi_buf_info);
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bb_ctxt->len = bb_ctxt->el_size * nr_el;
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bb_ctxt->base = kzalloc(bb_ctxt->len, GFP_KERNEL);
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bb_ctxt->wp = bb_ctxt->base;
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bb_ctxt->rp = bb_ctxt->base;
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bb_ctxt->ack_rp = bb_ctxt->base;
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if (!bb_ctxt->base)
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return -ENOMEM;
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return 0;
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}
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static void mhi_write_db(struct mhi_device_ctxt *mhi_dev_ctxt,
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void __iomem *io_addr_lower,
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uintptr_t chan, u64 val)
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@ -188,6 +201,69 @@ int get_chan_props(struct mhi_device_ctxt *mhi_dev_ctxt, int chan,
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return r;
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}
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int mhi_release_chan_ctxt(struct mhi_device_ctxt *mhi_dev_ctxt,
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struct mhi_chan_ctxt *cc_list,
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struct mhi_ring *ring)
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{
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if (cc_list == NULL || ring == NULL)
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return -EINVAL;
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dma_free_coherent(&mhi_dev_ctxt->dev_info->pcie_device->dev,
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ring->len, ring->base,
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cc_list->mhi_trb_ring_base_addr);
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mhi_init_chan_ctxt(cc_list, 0, 0, 0, 0, 0, ring,
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MHI_CHAN_STATE_DISABLED);
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return 0;
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}
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void free_tre_ring(struct mhi_client_handle *client_handle)
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{
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struct mhi_chan_ctxt *chan_ctxt;
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struct mhi_device_ctxt *mhi_dev_ctxt = client_handle->mhi_dev_ctxt;
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int chan = client_handle->chan_info.chan_nr;
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int r;
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chan_ctxt = &mhi_dev_ctxt->dev_space.ring_ctxt.cc_list[chan];
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r = mhi_release_chan_ctxt(mhi_dev_ctxt, chan_ctxt,
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&mhi_dev_ctxt->mhi_local_chan_ctxt[chan]);
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if (r)
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mhi_log(MHI_MSG_ERROR,
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"Failed to release chan %d ret %d\n", chan, r);
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}
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static int populate_tre_ring(struct mhi_client_handle *client_handle)
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{
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dma_addr_t ring_dma_addr;
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void *ring_local_addr;
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struct mhi_chan_ctxt *chan_ctxt;
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struct mhi_device_ctxt *mhi_dev_ctxt = client_handle->mhi_dev_ctxt;
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u32 chan = client_handle->chan_info.chan_nr;
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u32 nr_desc = client_handle->chan_info.max_desc;
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mhi_log(MHI_MSG_INFO,
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"Entered chan %d requested desc %d\n", chan, nr_desc);
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chan_ctxt = &mhi_dev_ctxt->dev_space.ring_ctxt.cc_list[chan];
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ring_local_addr = dma_alloc_coherent(
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&mhi_dev_ctxt->dev_info->pcie_device->dev,
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nr_desc * sizeof(union mhi_xfer_pkt),
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&ring_dma_addr, GFP_KERNEL);
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if (ring_local_addr == NULL)
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return -ENOMEM;
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mhi_init_chan_ctxt(chan_ctxt, ring_dma_addr,
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(uintptr_t)ring_local_addr,
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nr_desc,
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GET_CHAN_PROPS(CHAN_DIR,
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client_handle->chan_info.flags),
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client_handle->chan_info.ev_ring,
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&mhi_dev_ctxt->mhi_local_chan_ctxt[chan],
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MHI_CHAN_STATE_ENABLED);
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mhi_log(MHI_MSG_INFO, "Exited\n");
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return 0;
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}
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enum MHI_STATUS mhi_open_channel(struct mhi_client_handle *client_handle)
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{
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enum MHI_STATUS ret_val = MHI_STATUS_SUCCESS;
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@ -217,10 +293,24 @@ enum MHI_STATUS mhi_open_channel(struct mhi_client_handle *client_handle)
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chan, mhi_dev_ctxt->dev_exec_env);
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return MHI_STATUS_DEVICE_NOT_READY;
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}
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client_handle->event_ring_index =
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mhi_dev_ctxt->dev_space.ring_ctxt.
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cc_list[chan].mhi_event_ring_index;
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r = enable_bb_ctxt(&mhi_dev_ctxt->chan_bb_list[chan],
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client_handle->chan_info.max_desc);
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if (r) {
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mhi_log(MHI_MSG_ERROR,
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"Failed to initialize bb ctxt chan %d ret %d\n",
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chan, r);
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return r;
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}
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r = populate_tre_ring(client_handle);
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if (r) {
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mhi_log(MHI_MSG_ERROR,
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"Failed to initialize tre ring chan %d ret %d\n",
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chan, r);
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return r;
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}
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client_handle->msi_vec =
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mhi_dev_ctxt->dev_space.ring_ctxt.ec_list[
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@ -480,7 +570,7 @@ static int create_bb(struct mhi_device_ctxt *mhi_dev_ctxt,
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bb_info->dir);
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mhi_log(MHI_MSG_RAW, "Allocating BB, chan %d\n", chan);
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bb_info->bb_v_addr = dma_alloc_coherent(
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&mhi_dev_ctxt->dev_info->plat_dev->dev,
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&mhi_dev_ctxt->dev_info->pcie_device->dev,
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bb_info->buf_len,
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&bb_info->bb_p_addr,
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GFP_ATOMIC);
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@ -510,7 +600,7 @@ static void free_bounce_buffer(struct mhi_device_ctxt *mhi_dev_ctxt,
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bb->bb_p_addr, bb->buf_len, bb->dir);
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else
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/* This buffer was bounced */
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dma_free_coherent(&mhi_dev_ctxt->dev_info->plat_dev->dev,
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dma_free_coherent(&mhi_dev_ctxt->dev_info->pcie_device->dev,
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bb->buf_len,
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bb->bb_v_addr,
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bb->bb_p_addr);
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@ -1013,7 +1103,7 @@ enum MHI_STATUS parse_xfer_event(struct mhi_device_ctxt *ctxt,
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/* Get the TRB this event points to */
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local_ev_trb_loc = (void *)mhi_p2v_addr(mhi_dev_ctxt,
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MHI_RING_TYPE_EVENT_RING, event_id,
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MHI_RING_TYPE_XFER_RING, chan,
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phy_ev_trb_loc);
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local_trb_loc = (union mhi_xfer_pkt *)local_chan_ctxt->rp;
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@ -1,4 +1,4 @@
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/* Copyright (c) 2014-2015, The Linux Foundation. All rights reserved.
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/* Copyright (c) 2014-2016, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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@ -619,6 +619,7 @@ static enum MHI_STATUS process_amss_transition(
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}
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ring_all_chan_dbs(mhi_dev_ctxt);
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}
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ring_all_ev_dbs(mhi_dev_ctxt);
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atomic_dec(&mhi_dev_ctxt->flags.data_pending);
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if (!mhi_dev_ctxt->flags.pending_M3 &&
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mhi_dev_ctxt->flags.link_up)
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