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drm/msm/sde: fix color component order for UBWC formats

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For UBWC formats color component order should
be independent of endianness.

Fix the component order for UBWC formats based
on above requirement for SDE driver.

Change-Id: I054049105d3af99c5496328819ffef7d0eb9610a
Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org>
This commit is contained in:
Abhinav Kumar 2017-03-03 14:14:49 -08:00
parent 2a7bbea49b
commit d528f00b0b
1 changed files with 3 additions and 3 deletions
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6
drivers/gpu/drm/msm/sde/sde_formats.c
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@ -384,19 +384,19 @@ static const struct sde_format sde_format_map[] = {
* the data will be passed by user-space. * the data will be passed by user-space.
*/ */
static const struct sde_format sde_format_map_ubwc[] = { static const struct sde_format sde_format_map_ubwc[] = {
INTERLEAVED_RGB_FMT(BGR565, INTERLEAVED_RGB_FMT(RGB565,
0, COLOR_5BIT, COLOR_6BIT, COLOR_5BIT, 0, COLOR_5BIT, COLOR_6BIT, COLOR_5BIT,
C2_R_Cr, C0_G_Y, C1_B_Cb, 0, 3, C2_R_Cr, C0_G_Y, C1_B_Cb, 0, 3,
false, 2, 0, false, 2, 0,
SDE_FETCH_UBWC, 2), SDE_FETCH_UBWC, 2),
INTERLEAVED_RGB_FMT(ABGR8888, INTERLEAVED_RGB_FMT(RGBA8888,
COLOR_8BIT, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT,
C2_R_Cr, C0_G_Y, C1_B_Cb, C3_ALPHA, 4, C2_R_Cr, C0_G_Y, C1_B_Cb, C3_ALPHA, 4,
true, 4, 0, true, 4, 0,
SDE_FETCH_UBWC, 2), SDE_FETCH_UBWC, 2),
INTERLEAVED_RGB_FMT(XBGR8888, INTERLEAVED_RGB_FMT(RGBX8888,
COLOR_8BIT, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT,
C2_R_Cr, C0_G_Y, C1_B_Cb, C3_ALPHA, 4, C2_R_Cr, C0_G_Y, C1_B_Cb, C3_ALPHA, 4,
false, 4, 0, false, 4, 0,