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Merge branch 'x86/apic' of git://git.kernel.org/pub/scm/linux/kernel/git/jeremy/xen into x86/apic

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This commit is contained in:
Ingo Molnar 2009-02-11 10:49:40 +01:00
commit d5b5a232b2
6 changed files with 56 additions and 17 deletions
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35
arch/x86/include/asm/apic.h
View file

@ -139,12 +139,35 @@ struct apic_ops {
extern struct apic_ops *apic_ops; extern struct apic_ops *apic_ops;
#define apic_read (apic_ops->read) static inline u32 apic_read(u32 reg)
#define apic_write (apic_ops->write) {
#define apic_icr_read (apic_ops->icr_read) return apic_ops->read(reg);
#define apic_icr_write (apic_ops->icr_write) }
#define apic_wait_icr_idle (apic_ops->wait_icr_idle)
#define safe_apic_wait_icr_idle (apic_ops->safe_wait_icr_idle) static inline void apic_write(u32 reg, u32 val)
{
apic_ops->write(reg, val);
}
static inline u64 apic_icr_read(void)
{
return apic_ops->icr_read();
}
static inline void apic_icr_write(u32 low, u32 high)
{
apic_ops->icr_write(low, high);
}
static inline void apic_wait_icr_idle(void)
{
apic_ops->wait_icr_idle();
}
static inline u32 safe_apic_wait_icr_idle(void)
{
return apic_ops->safe_wait_icr_idle();
}
extern int get_physical_broadcast(void); extern int get_physical_broadcast(void);

2
arch/x86/include/asm/hw_irq.h
View file

@ -65,9 +65,7 @@ extern void disable_IO_APIC(void);
extern int IO_APIC_get_PCI_irq_vector(int bus, int slot, int fn); extern int IO_APIC_get_PCI_irq_vector(int bus, int slot, int fn);
extern void setup_ioapic_dest(void); extern void setup_ioapic_dest(void);
#ifdef CONFIG_X86_64
extern void enable_IO_APIC(void); extern void enable_IO_APIC(void);
#endif
/* Statistics */ /* Statistics */
extern atomic_t irq_err_count; extern atomic_t irq_err_count;

6
arch/x86/include/asm/io_apic.h
View file

@ -169,6 +169,12 @@ extern void reinit_intr_remapped_IO_APIC(int);
extern void probe_nr_irqs_gsi(void); extern void probe_nr_irqs_gsi(void);
extern int setup_ioapic_entry(int apic, int irq,
struct IO_APIC_route_entry *entry,
unsigned int destination, int trigger,
int polarity, int vector);
extern void ioapic_write_entry(int apic, int pin,
struct IO_APIC_route_entry e);
#else /* !CONFIG_X86_IO_APIC */ #else /* !CONFIG_X86_IO_APIC */
#define io_apic_assign_pci_irqs 0 #define io_apic_assign_pci_irqs 0
static const int timer_through_8259 = 0; static const int timer_through_8259 = 0;

2
arch/x86/include/asm/mpspec.h
View file

@ -77,6 +77,8 @@ extern int acpi_probe_gsi(void);
#ifdef CONFIG_X86_IO_APIC #ifdef CONFIG_X86_IO_APIC
extern int mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin, extern int mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin,
u32 gsi, int triggering, int polarity); u32 gsi, int triggering, int polarity);
extern int mp_find_ioapic(int gsi);
extern int mp_find_ioapic_pin(int ioapic, int gsi);
#else #else
static inline int static inline int
mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin, mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin,

18
arch/x86/kernel/acpi/boot.c
View file

@ -872,7 +872,7 @@ static struct {
DECLARE_BITMAP(pin_programmed, MP_MAX_IOAPIC_PIN + 1); DECLARE_BITMAP(pin_programmed, MP_MAX_IOAPIC_PIN + 1);
} mp_ioapic_routing[MAX_IO_APICS]; } mp_ioapic_routing[MAX_IO_APICS];
static int mp_find_ioapic(int gsi) int mp_find_ioapic(int gsi)
{ {
int i = 0; int i = 0;
@ -887,6 +887,16 @@ static int mp_find_ioapic(int gsi)
return -1; return -1;
} }
int mp_find_ioapic_pin(int ioapic, int gsi)
{
if (WARN_ON(ioapic == -1))
return -1;
if (WARN_ON(gsi > mp_ioapic_routing[ioapic].gsi_end))
return -1;
return gsi - mp_ioapic_routing[ioapic].gsi_base;
}
static u8 __init uniq_ioapic_id(u8 id) static u8 __init uniq_ioapic_id(u8 id)
{ {
#ifdef CONFIG_X86_32 #ifdef CONFIG_X86_32
@ -1022,7 +1032,7 @@ void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, u32 gsi)
ioapic = mp_find_ioapic(gsi); ioapic = mp_find_ioapic(gsi);
if (ioapic < 0) if (ioapic < 0)
return; return;
pin = gsi - mp_ioapic_routing[ioapic].gsi_base; pin = mp_find_ioapic_pin(ioapic, gsi);
/* /*
* TBD: This check is for faulty timer entries, where the override * TBD: This check is for faulty timer entries, where the override
@ -1142,7 +1152,7 @@ int mp_register_gsi(u32 gsi, int triggering, int polarity)
return gsi; return gsi;
} }
ioapic_pin = gsi - mp_ioapic_routing[ioapic].gsi_base; ioapic_pin = mp_find_ioapic_pin(ioapic, gsi);
#ifdef CONFIG_X86_32 #ifdef CONFIG_X86_32
if (ioapic_renumber_irq) if (ioapic_renumber_irq)
@ -1231,7 +1241,7 @@ int mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin,
mp_irq.srcbusirq = (((devfn >> 3) & 0x1f) << 2) | ((pin - 1) & 3); mp_irq.srcbusirq = (((devfn >> 3) & 0x1f) << 2) | ((pin - 1) & 3);
ioapic = mp_find_ioapic(gsi); ioapic = mp_find_ioapic(gsi);
mp_irq.dstapic = mp_ioapic_routing[ioapic].apic_id; mp_irq.dstapic = mp_ioapic_routing[ioapic].apic_id;
mp_irq.dstirq = gsi - mp_ioapic_routing[ioapic].gsi_base; mp_irq.dstirq = mp_find_ioapic_pin(ioapic, gsi);
save_mp_irq(&mp_irq); save_mp_irq(&mp_irq);
#endif #endif

10
arch/x86/kernel/io_apic.c
View file

@ -486,7 +486,7 @@ __ioapic_write_entry(int apic, int pin, struct IO_APIC_route_entry e)
io_apic_write(apic, 0x10 + 2*pin, eu.w1); io_apic_write(apic, 0x10 + 2*pin, eu.w1);
} }
static void ioapic_write_entry(int apic, int pin, struct IO_APIC_route_entry e) void ioapic_write_entry(int apic, int pin, struct IO_APIC_route_entry e)
{ {
unsigned long flags; unsigned long flags;
spin_lock_irqsave(&ioapic_lock, flags); spin_lock_irqsave(&ioapic_lock, flags);
@ -1478,10 +1478,10 @@ static void ioapic_register_intr(int irq, struct irq_desc *desc, unsigned long t
handle_edge_irq, "edge"); handle_edge_irq, "edge");
} }
static int setup_ioapic_entry(int apic_id, int irq, int setup_ioapic_entry(int apic_id, int irq,
struct IO_APIC_route_entry *entry, struct IO_APIC_route_entry *entry,
unsigned int destination, int trigger, unsigned int destination, int trigger,
int polarity, int vector) int polarity, int vector)
{ {
/* /*
* add it to the IO-APIC irq-routing table: * add it to the IO-APIC irq-routing table: