Merge "ARM: dts: msm: Config sdm660 CPR controllers to use default step_quot"
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commit
d73ebfb7fa
5 changed files with 38 additions and 0 deletions
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@ -209,6 +209,15 @@ Platform independent properties:
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as the corresponding addresses are specified in
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the qcom,cpr-panic-reg-addr-list property.
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- qcom,cpr-reset-step-quot-loop-en
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Usage: optional; only meaningful for CPR4 and CPRh controllers
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Value type: <empty>
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Definition: Boolean value which indicates that the CPR controller should
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be configured to reset step_quot on each loop_en = 0
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transition. This configuration allows the CPR controller to
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first use the default step_quot and then later switch to the
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run-time calibrated step_quot.
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=================================================
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Second Level Nodes - CPR Threads for a Controller
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=================================================
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@ -547,6 +547,7 @@
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qcom,cpr-step-quot-init-max = <14>;
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qcom,cpr-count-mode = <0>; /* All at once */
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qcom,cpr-count-repeat = <14>;
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qcom,cpr-reset-step-quot-loop-en;
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vdd-supply = <&gfx_stub_vreg>;
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mem-acc-supply = <&gfx_mem_acc_vreg>;
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@ -664,6 +665,7 @@
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qcom,voltage-step = <4000>;
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qcom,voltage-base = <400000>;
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qcom,cpr-saw-use-unit-mV;
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qcom,cpr-reset-step-quot-loop-en;
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qcom,cpr-panic-reg-addr-list =
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<0x179cbaa4 0x17912c18>;
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@ -738,6 +740,7 @@
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qcom,voltage-step = <4000>;
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qcom,voltage-base = <400000>;
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qcom,cpr-saw-use-unit-mV;
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qcom,cpr-reset-step-quot-loop-en;
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qcom,cpr-panic-reg-addr-list =
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<0x179c7aa4 0x17812c18>;
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@ -174,6 +174,7 @@
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#define CPR4_CPR_TIMER_CLAMP_THREAD_AGGREGATION_EN BIT(27)
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#define CPR4_REG_MISC 0x700
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#define CPR4_MISC_RESET_STEP_QUOT_LOOP_EN BIT(2)
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#define CPR4_MISC_MARGIN_TABLE_ROW_SELECT_MASK GENMASK(23, 20)
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#define CPR4_MISC_MARGIN_TABLE_ROW_SELECT_SHIFT 20
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#define CPR4_MISC_TEMP_SENSOR_ID_START_MASK GENMASK(27, 24)
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@ -698,6 +699,11 @@ static int cpr3_regulator_init_cpr4(struct cpr3_controller *ctrl)
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int thread_id = 0;
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u64 temp;
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if (ctrl->reset_step_quot_loop_en)
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cpr3_masked_write(ctrl, CPR4_REG_MISC,
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CPR4_MISC_RESET_STEP_QUOT_LOOP_EN,
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CPR4_MISC_RESET_STEP_QUOT_LOOP_EN);
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if (ctrl->supports_hw_closed_loop) {
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if (ctrl->saw_use_unit_mV)
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pmic_step_size = ctrl->step_volt / 1000;
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@ -1310,6 +1316,11 @@ static int cpr3_regulator_init_cprh(struct cpr3_controller *ctrl)
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return rc;
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}
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if (ctrl->reset_step_quot_loop_en)
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cpr3_masked_write(ctrl, CPR4_REG_MISC,
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CPR4_MISC_RESET_STEP_QUOT_LOOP_EN,
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CPR4_MISC_RESET_STEP_QUOT_LOOP_EN);
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if (ctrl->saw_use_unit_mV)
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pmic_step_size = ctrl->step_volt / 1000;
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cpr3_masked_write(ctrl, CPR4_REG_MARGIN_ADJ_CTL,
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@ -735,6 +735,12 @@ struct cpr3_panic_regs_info {
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* @panic_notifier: Notifier block registered to global panic notifier list.
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* @support_ldo300_vreg: Boolean value which indicates that this CPR controller
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* manages an underlying LDO regulator of type LDO300.
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* @reset_step_quot_loop_en: Boolean value which indicates that this CPR
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* controller should be configured to reset step_quot on
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* each loop_en = 0 transition. This configuration allows
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* the CPR controller to first use the default step_quot
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* and then later switch to the run-time calibrated
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* step_quot.
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*
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* This structure contains both configuration and runtime state data. The
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* elements cpr_allowed_sw, use_hw_closed_loop, aggr_corner, cpr_enabled,
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@ -836,6 +842,7 @@ struct cpr3_controller {
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struct cpr3_panic_regs_info *panic_regs_info;
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struct notifier_block panic_notifier;
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bool support_ldo300_vreg;
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bool reset_step_quot_loop_en;
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};
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/* Used for rounding voltages to the closest physically available set point. */
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@ -1220,6 +1220,14 @@ int cpr3_parse_common_ctrl_data(struct cpr3_controller *ctrl)
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return -ENODEV;
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}
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/*
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* Reset step_quot to default on each loop_en = 0 transition is
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* optional.
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*/
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ctrl->reset_step_quot_loop_en
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= of_property_read_bool(ctrl->dev->of_node,
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"qcom,cpr-reset-step-quot-loop-en");
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/*
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* Regulator device handles are not necessary for CPRh controllers
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* since communication with the regulators is completely managed
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