msm: mdss: update the incorrect usage of mixer count
Layer mixer count is used for configuring SSPP(source side post processing), DSPP(Destination side post processing) modules. There can be a mismatch between the number of layer mixers with SSPP, DSPP modules. Driver should be using the sspp, dspp counts instead of using the layer mixer count. This change udpates the logic to use the module count specific to pipe instead of layer mixer count Change-Id: I32e32ed233d9c7026135087d05458e8af13d72e7 Signed-off-by: Ping Li <pingli@codeaurora.org>
This commit is contained in:
Ping li
David Keitel
parent
0db67521c1
commit
d892b4e127
1 changed files with 50 additions and 38 deletions
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@ -338,7 +338,8 @@ static int pp_hist_disable(struct pp_hist_col_info *hist_info);
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static void pp_update_pcc_regs(char __iomem *addr,
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struct mdp_pcc_cfg_data *cfg_ptr);
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static void pp_update_igc_lut(struct mdp_igc_lut_data *cfg,
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char __iomem *addr, u32 blk_idx);
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char __iomem *addr, u32 blk_idx,
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u32 total_idx);
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static void pp_update_gc_one_lut(char __iomem *addr,
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struct mdp_ar_gc_lut_data *lut_data,
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uint8_t num_stages);
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@ -363,7 +364,7 @@ static void pp_pcc_config(unsigned long flags, char __iomem *addr,
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static void pp_igc_config(unsigned long flags, char __iomem *addr,
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struct pp_sts_type *pp_sts,
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struct mdp_igc_lut_data *igc_config,
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u32 pipe_num);
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u32 pipe_num, u32 pipe_cnt);
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static void pp_enhist_config(unsigned long flags, char __iomem *addr,
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struct pp_sts_type *pp_sts,
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struct mdp_hist_lut_data *enhist_cfg);
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@ -764,12 +765,13 @@ static void pp_pcc_config(unsigned long flags, char __iomem *addr,
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static void pp_igc_config(unsigned long flags, char __iomem *addr,
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struct pp_sts_type *pp_sts,
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struct mdp_igc_lut_data *igc_config,
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u32 pipe_num)
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u32 pipe_num, u32 pipe_cnt)
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{
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u32 tbl_idx;
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if (flags & PP_FLAGS_DIRTY_IGC) {
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if (igc_config->ops & MDP_PP_OPS_WRITE)
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pp_update_igc_lut(igc_config, addr, pipe_num);
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pp_update_igc_lut(igc_config, addr, pipe_num,
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pipe_cnt);
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if (igc_config->ops & MDP_PP_IGC_FLAG_ROM0) {
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pp_sts->pcc_sts |= PP_STS_ENABLE;
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@ -1318,7 +1320,7 @@ int mdss_mdp_pipe_sspp_setup(struct mdss_mdp_pipe *pipe, u32 *op)
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int ret = 0;
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unsigned long flags = 0;
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char __iomem *pipe_base;
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u32 pipe_num;
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u32 pipe_num, pipe_cnt;
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struct mdss_data_type *mdata = mdss_mdp_get_mdata();
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u32 current_opmode;
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u32 dcm_state = DCM_UNINIT;
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@ -1344,6 +1346,7 @@ int mdss_mdp_pipe_sspp_setup(struct mdss_mdp_pipe *pipe, u32 *op)
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switch (pipe->type) {
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case MDSS_MDP_PIPE_TYPE_VIG:
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pipe_base = mdata->mdp_base + MDSS_MDP_REG_IGC_VIG_BASE;
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pipe_cnt = mdata->nvig_pipes;
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switch (pipe->num) {
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case MDSS_MDP_SSPP_VIG0:
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pipe_num = 0;
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@ -1365,6 +1368,7 @@ int mdss_mdp_pipe_sspp_setup(struct mdss_mdp_pipe *pipe, u32 *op)
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break;
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case MDSS_MDP_PIPE_TYPE_RGB:
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pipe_base = mdata->mdp_base + MDSS_MDP_REG_IGC_RGB_BASE;
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pipe_cnt = mdata->nrgb_pipes;
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switch (pipe->num) {
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case MDSS_MDP_SSPP_RGB0:
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pipe_num = 0;
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@ -1387,6 +1391,7 @@ int mdss_mdp_pipe_sspp_setup(struct mdss_mdp_pipe *pipe, u32 *op)
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case MDSS_MDP_PIPE_TYPE_DMA:
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pipe_base = mdata->mdp_base + MDSS_MDP_REG_IGC_DMA_BASE;
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pipe_num = pipe->num - MDSS_MDP_SSPP_DMA0;
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pipe_cnt = mdata->ndma_pipes;
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break;
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default:
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pr_err("Invalid pipe type %d\n", pipe->type);
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@ -1396,7 +1401,7 @@ int mdss_mdp_pipe_sspp_setup(struct mdss_mdp_pipe *pipe, u32 *op)
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if (pipe->pp_cfg.config_ops & MDP_OVERLAY_PP_IGC_CFG) {
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flags |= PP_FLAGS_DIRTY_IGC;
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pp_igc_config(flags, pipe_base, &pipe->pp_res.pp_sts,
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&pipe->pp_cfg.igc_cfg, pipe_num);
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&pipe->pp_cfg.igc_cfg, pipe_num, pipe_cnt);
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}
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if (pipe->pp_res.pp_sts.igc_sts & PP_STS_ENABLE)
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@ -1422,7 +1427,7 @@ static int pp_mixer_setup(u32 disp_num,
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/* no corresponding dspp */
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if ((mixer->type != MDSS_MDP_MIXER_TYPE_INTF) ||
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(dspp_num >= mdata->nmixers_intf))
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(dspp_num >= mdata->ndspp))
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return 0;
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if (disp_num < MDSS_BLOCK_DISP_NUM)
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flags = mdss_pp_res->pp_disp_flags[disp_num];
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@ -1466,7 +1471,7 @@ static char __iomem *mdss_mdp_get_mixer_addr_off(u32 dspp_num)
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struct mdss_mdp_mixer *mixer;
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mdata = mdss_mdp_get_mdata();
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if (mdata->nmixers_intf <= dspp_num) {
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if (mdata->ndspp <= dspp_num) {
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pr_err("Invalid dspp_num=%d\n", dspp_num);
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return ERR_PTR(-EINVAL);
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}
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@ -1480,11 +1485,9 @@ static char __iomem *mdss_mdp_get_dspp_addr_off(u32 dspp_num)
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struct mdss_mdp_mixer *mixer;
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mdata = mdss_mdp_get_mdata();
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if (mdata->nmixers_intf <= dspp_num) {
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pr_err("Invalid dspp_num=%d\n", dspp_num);
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return ERR_PTR(-EINVAL);
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} else if (mdata->ndspp <= dspp_num) {
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pr_err("destination not supported dspp_num=%d", dspp_num);
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if (mdata->ndspp <= dspp_num) {
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pr_debug("destination not supported dspp_num=%d\n",
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dspp_num);
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return ERR_PTR(-EINVAL);
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}
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mixer = mdata->mixer_intf + dspp_num;
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@ -1669,7 +1672,7 @@ static int pp_dspp_setup(u32 disp_num, struct mdss_mdp_mixer *mixer)
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dspp_num = mixer->num;
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/* no corresponding dspp */
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if ((mixer->type != MDSS_MDP_MIXER_TYPE_INTF) ||
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(dspp_num >= mdata->nmixers_intf))
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(dspp_num >= mdata->ndspp))
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return -EINVAL;
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base = mdss_mdp_get_dspp_addr_off(dspp_num);
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if (IS_ERR(base))
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@ -1719,7 +1722,7 @@ static int pp_dspp_setup(u32 disp_num, struct mdss_mdp_mixer *mixer)
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pp_igc_config(flags, mdata->mdp_base + MDSS_MDP_REG_IGC_DSPP_BASE,
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pp_sts, &mdss_pp_res->igc_disp_cfg[disp_num],
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dspp_num);
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dspp_num, mdata->ndspp);
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pp_enhist_config(flags, base + MDSS_MDP_REG_DSPP_HIST_LUT_BASE,
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pp_sts, &mdss_pp_res->enhist_disp_cfg[disp_num]);
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@ -1914,8 +1917,8 @@ int mdss_mdp_pp_resume(struct mdss_mdp_ctl *ctl, u32 dspp_num)
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if (!mdata)
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return -EPERM;
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if (dspp_num >= mdata->nmixers_intf) {
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pr_warn("invalid dspp_num\n");
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if (dspp_num >= mdata->ndspp) {
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pr_err("invalid dspp_num %d\n", dspp_num);
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return -EINVAL;
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}
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disp_num = ctl->mfd->index;
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@ -2170,14 +2173,14 @@ int mdss_mdp_pp_init(struct device *dev)
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hist = devm_kzalloc(dev,
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sizeof(struct pp_hist_col_info) *
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mdata->nmixers_intf,
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mdata->ndspp,
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GFP_KERNEL);
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if (hist == NULL) {
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pr_err("dspp histogram allocation failed!\n");
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ret = -ENOMEM;
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devm_kfree(dev, mdss_pp_res);
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} else {
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for (i = 0; i < mdata->nmixers_intf; i++) {
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for (i = 0; i < mdata->ndspp; i++) {
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mutex_init(&hist[i].hist_mutex);
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spin_lock_init(&hist[i].hist_lock);
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hist[i].intr_shift = (i * 4) + 12;
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@ -2188,7 +2191,7 @@ int mdss_mdp_pp_init(struct device *dev)
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init_completion(&hist[i].comp);
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init_completion(&hist[i].first_kick);
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}
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if (mdata->nmixers_intf == 4)
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if (mdata->ndspp == 4)
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hist[3].intr_shift = 22;
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mdss_pp_res->dspp_hist = hist;
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@ -2326,7 +2329,7 @@ static int pp_get_dspp_num(u32 disp_num, u32 *dspp_num)
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if (mixer_id[i] < mdata->nmixers_intf)
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break;
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}
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if (i >= mixer_cnt || mixer_id[i] > mdata->ndspp)
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if (i >= mixer_cnt || mixer_id[i] >= mdata->ndspp)
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return -EPERM;
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*dspp_num = mixer_id[i];
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return 0;
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@ -2737,16 +2740,15 @@ static void pp_read_igc_lut_cached(struct mdp_igc_lut_data *cfg)
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}
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static void pp_read_igc_lut(struct mdp_igc_lut_data *cfg,
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char __iomem *addr, u32 blk_idx)
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char __iomem *addr, u32 blk_idx, int32_t total_idx)
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{
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int i;
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u32 data;
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struct mdss_data_type *mdata = mdss_mdp_get_mdata();
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int32_t mask = 0, n_mixers = mdata->nmixers_intf;
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int32_t mask = 0, idx = total_idx;
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while (n_mixers > 0) {
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while (idx > 0) {
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mask = (mask << 1) + 1;
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n_mixers--;
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idx--;
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}
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/* INDEX_UPDATE & VALUE_UPDATEN */
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data = (3 << 24) | (((~(1 << blk_idx)) & mask) << 28);
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@ -2767,16 +2769,16 @@ static void pp_read_igc_lut(struct mdp_igc_lut_data *cfg,
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}
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static void pp_update_igc_lut(struct mdp_igc_lut_data *cfg,
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char __iomem *addr, u32 blk_idx)
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char __iomem *addr, u32 blk_idx,
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u32 total_idx)
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{
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int i;
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u32 data;
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struct mdss_data_type *mdata = mdss_mdp_get_mdata();
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int32_t mask = 0, n_mixers = mdata->nmixers_intf;
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int32_t mask = 0, idx = total_idx;
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while (n_mixers > 0) {
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while (idx > 0) {
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mask = (mask << 1) + 1;
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n_mixers--;
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idx--;
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}
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/* INDEX_UPDATE */
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@ -2873,7 +2875,8 @@ int mdss_mdp_igc_lut_config(struct mdp_igc_lut_data *config,
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if (mdata->has_no_lut_read)
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pp_read_igc_lut_cached(&local_cfg);
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else
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pp_read_igc_lut(&local_cfg, igc_addr, dspp_num);
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pp_read_igc_lut(&local_cfg, igc_addr, dspp_num,
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mdata->ndspp);
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if (copy_to_user(config->c0_c1_data, local_cfg.c0_c1_data,
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config->len * sizeof(u32))) {
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ret = -EFAULT;
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@ -3597,6 +3600,11 @@ int mdss_mdp_hist_start(struct mdp_histogram_start_req *req)
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} else if (PP_LOCAT(req->block) == MDSS_PP_DSPP_CFG) {
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for (i = 0; i < mixer_cnt; i++) {
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dspp_num = mixer_id[i];
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if (dspp_num >= mdata->ndspp) {
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ret = -EINVAL;
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pr_warn("Invalid dspp num %d\n", dspp_num);
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goto hist_stop_clk;
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}
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hist_info = &mdss_pp_res->dspp_hist[dspp_num];
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ret = pp_hist_enable(hist_info, req);
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mdss_pp_res->pp_disp_flags[disp_num] |=
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@ -3703,6 +3711,11 @@ int mdss_mdp_hist_stop(u32 block)
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} else if (PP_LOCAT(block) == MDSS_PP_DSPP_CFG) {
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for (i = 0; i < mixer_cnt; i++) {
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dspp_num = mixer_id[i];
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if (dspp_num >= mdata->ndspp) {
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ret = -EINVAL;
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pr_warn("Invalid dspp num %d\n", dspp_num);
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goto hist_stop_clk;
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}
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hist_info = &mdss_pp_res->dspp_hist[dspp_num];
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ret = pp_hist_disable(hist_info);
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if (ret)
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@ -4011,6 +4024,11 @@ int mdss_mdp_hist_collect(struct mdp_histogram_data *hist)
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if (PP_LOCAT(hist->block) == MDSS_PP_DSPP_CFG) {
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for (i = 0; i < hist_cnt; i++) {
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dspp_num = mixer_id[i];
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if (dspp_num >= mdata->ndspp) {
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ret = -EINVAL;
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pr_warn("Invalid dspp num %d\n", dspp_num);
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goto hist_collect_exit;
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}
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hists[i] = &mdss_pp_res->dspp_hist[dspp_num];
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}
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for (i = 0; i < hist_cnt; i++) {
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@ -4021,12 +4039,6 @@ int mdss_mdp_hist_collect(struct mdp_histogram_data *hist)
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}
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for (i = 0; i < hist_cnt; i++) {
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dspp_num = mixer_id[i];
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if (dspp_num > mdata->ndspp) {
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pr_err("%s, hist destination not supported",
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__func__);
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ret = -EPERM;
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goto hist_collect_exit;
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}
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ctl_base = mdss_mdp_get_dspp_addr_off(dspp_num) +
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MDSS_MDP_REG_DSPP_HIST_CTL_BASE;
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exp_sum = (mdata->mixer_intf[dspp_num].width *
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