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staging: comedi: ni_stc.h: tidy up Interrupt_Control_Register and bits

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Rename the CamelCase. Use the BIT() macro to define the bits.

Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
H Hartley Sweeten 2015-05-01 14:59:15 -07:00 • committed by Greg Kroah-Hartman
parent a4f18b1c40
commit d8f62c4638
3 changed files with 19 additions and 18 deletions
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15
drivers/staging/comedi/drivers/ni_mio_common.c
View file

@ -354,7 +354,7 @@ static const struct mio_regmap m_series_stc_write_regmap[] = {
[NISTC_CLK_FOUT_REG] = { 0x170, 2 },
[NISTC_IO_BIDIR_PIN_REG] = { 0x172, 2 },
[NISTC_RTSI_TRIG_DIR_REG] = { 0x174, 2 },
[Interrupt_Control_Register] = { 0x176, 2 },
[NISTC_INT_CTRL_REG] = { 0x176, 2 },
[AI_Output_Control_Register] = { 0x178, 2 },
[Analog_Trigger_Etc_Register] = { 0x17a, 2 },
[AI_START_STOP_Select_Register] = { 0x17c, 2 },
@ -5389,12 +5389,13 @@ static int ni_E_init(struct comedi_device *dev,
if (dev->irq) {
ni_stc_writew(dev,
(irq_polarity ? Interrupt_Output_Polarity : 0) |
(Interrupt_Output_On_3_Pins & 0) |
Interrupt_A_Enable | Interrupt_B_Enable |
Interrupt_A_Output_Select(interrupt_pin) |
Interrupt_B_Output_Select(interrupt_pin),
Interrupt_Control_Register);
(irq_polarity ? NISTC_INT_CTRL_INT_POL : 0) |
(NISTC_INT_CTRL_3PIN_INT & 0) |
NISTC_INT_CTRL_INTA_ENA |
NISTC_INT_CTRL_INTB_ENA |
NISTC_INT_CTRL_INTA_SEL(interrupt_pin) |
NISTC_INT_CTRL_INTB_SEL(interrupt_pin),
NISTC_INT_CTRL_REG);
}
/* DMA setup */

2
drivers/staging/comedi/drivers/ni_pcimio.c
View file

@ -1085,7 +1085,7 @@ static void init_6143(struct comedi_device *dev)
struct ni_private *devpriv = dev->private;
/* Disable interrupts */
ni_stc_writew(dev, 0, Interrupt_Control_Register);
ni_stc_writew(dev, 0, NISTC_INT_CTRL_REG);
/* Initialise 6143 AI specific bits */

20
drivers/staging/comedi/drivers/ni_stc.h
View file

@ -285,6 +285,16 @@
#define NISTC_RTSI_TRIG_USE_CLK BIT(1)
#define NISTC_RTSI_TRIG_DRV_CLK BIT(0)
#define NISTC_INT_CTRL_REG 59
#define NISTC_INT_CTRL_INTB_ENA BIT(15)
#define NISTC_INT_CTRL_INTB_SEL(x) (((x) & 0x7) << 12)
#define NISTC_INT_CTRL_INTA_ENA BIT(11)
#define NISTC_INT_CTRL_INTA_SEL(x) (((x) & 0x7) << 8)
#define NISTC_INT_CTRL_PASSTHRU0_POL BIT(3)
#define NISTC_INT_CTRL_PASSTHRU1_POL BIT(2)
#define NISTC_INT_CTRL_3PIN_INT BIT(1)
#define NISTC_INT_CTRL_INT_POL BIT(0)
#define AI_Status_1_Register 2
#define Interrupt_A_St 0x8000
#define AI_FIFO_Full_St 0x4000
@ -343,16 +353,6 @@ enum Joint_Status_2_Bits {
#define AO_BC_Save_Registers 18
#define AO_UC_Save_Registers 20
#define Interrupt_Control_Register 59
#define Interrupt_B_Enable _bit15
#define Interrupt_B_Output_Select(x) ((x)<<12)
#define Interrupt_A_Enable _bit11
#define Interrupt_A_Output_Select(x) ((x)<<8)
#define Pass_Thru_0_Interrupt_Polarity _bit3
#define Pass_Thru_1_Interrupt_Polarity _bit2
#define Interrupt_Output_On_3_Pins _bit1
#define Interrupt_Output_Polarity _bit0
#define AI_Output_Control_Register 60
#define AI_START_Output_Select _bit10
#define AI_SCAN_IN_PROG_Output_Select(x) (((x) & 0x3) << 8)