evie/android_kernel_oneplus_msm8998
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drm/msm : fix hdmi controller register programming

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Currently, there is an incorrect programming of the
hdmi controller register where default value of the
datapath mode bit is being toggled along with the
scrambler enable/disable.

This bit should be untouched as per the hardware
programming sequence and kept at the default state.

Fix the register programming to avoid toggling this
bit.

Change-Id: I2e8f74c0abaddd27b5d8a2136afc4e1b82f96e7d
Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org>
This commit is contained in:
Abhinav Kumar 2017-06-07 02:19:43 -07:00
parent ccde34ffb3
commit d9bdeba0e1
1 changed files with 0 additions and 2 deletions
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2
drivers/gpu/drm/msm/hdmi-staging/sde_hdmi_bridge.c
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@ -328,7 +328,6 @@ static int _sde_hdmi_bridge_setup_scrambler(struct hdmi *hdmi,
} }
reg_val = hdmi_read(hdmi, REG_HDMI_CTRL); reg_val = hdmi_read(hdmi, REG_HDMI_CTRL);
reg_val |= BIT(31); /* Enable Update DATAPATH_MODE */
reg_val |= BIT(28); /* Set SCRAMBLER_EN bit */ reg_val |= BIT(28); /* Set SCRAMBLER_EN bit */
hdmi_write(hdmi, REG_HDMI_CTRL, reg_val); hdmi_write(hdmi, REG_HDMI_CTRL, reg_val);
@ -360,7 +359,6 @@ static int _sde_hdmi_bridge_setup_scrambler(struct hdmi *hdmi,
} else { } else {
sde_hdmi_scdc_write(hdmi, HDMI_TX_SCDC_SCRAMBLING_ENABLE, 0x0); sde_hdmi_scdc_write(hdmi, HDMI_TX_SCDC_SCRAMBLING_ENABLE, 0x0);
reg_val = hdmi_read(hdmi, REG_HDMI_CTRL); reg_val = hdmi_read(hdmi, REG_HDMI_CTRL);
reg_val &= ~BIT(31); /* Disable Update DATAPATH_MODE */
reg_val &= ~BIT(28); /* Unset SCRAMBLER_EN bit */ reg_val &= ~BIT(28); /* Unset SCRAMBLER_EN bit */
hdmi_write(hdmi, REG_HDMI_CTRL, reg_val); hdmi_write(hdmi, REG_HDMI_CTRL, reg_val);
} }