drm/msm : fix hdmi controller register programming
Currently, there is an incorrect programming of the hdmi controller register where default value of the datapath mode bit is being toggled along with the scrambler enable/disable. This bit should be untouched as per the hardware programming sequence and kept at the default state. Fix the register programming to avoid toggling this bit. Change-Id: I2e8f74c0abaddd27b5d8a2136afc4e1b82f96e7d Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org>
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@ -328,7 +328,6 @@ static int _sde_hdmi_bridge_setup_scrambler(struct hdmi *hdmi,
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}
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reg_val = hdmi_read(hdmi, REG_HDMI_CTRL);
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reg_val |= BIT(31); /* Enable Update DATAPATH_MODE */
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reg_val |= BIT(28); /* Set SCRAMBLER_EN bit */
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hdmi_write(hdmi, REG_HDMI_CTRL, reg_val);
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@ -360,7 +359,6 @@ static int _sde_hdmi_bridge_setup_scrambler(struct hdmi *hdmi,
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} else {
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sde_hdmi_scdc_write(hdmi, HDMI_TX_SCDC_SCRAMBLING_ENABLE, 0x0);
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reg_val = hdmi_read(hdmi, REG_HDMI_CTRL);
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reg_val &= ~BIT(31); /* Disable Update DATAPATH_MODE */
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reg_val &= ~BIT(28); /* Unset SCRAMBLER_EN bit */
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hdmi_write(hdmi, REG_HDMI_CTRL, reg_val);
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}
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