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staging: comedi: pcl812: remove 0/NULL initialzation in boardinfo

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The unlisted members in the boardinfo declaration will default to 0/NULL.

Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
H Hartley Sweeten 2014-02-17 14:26:38 -07:00 • committed by Greg Kroah-Hartman
parent 43f1b6e9fa
commit d9e19eb5f0
1 changed files with 0 additions and 61 deletions
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61
drivers/staging/comedi/drivers/pcl812.c
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@ -354,7 +354,6 @@ static const struct pcl812_board boardtypes[] = {
.name = "pcl812", .name = "pcl812",
.board_type = boardPCL812, .board_type = boardPCL812,
.n_aichan = 16, .n_aichan = 16,
.n_aichan_diff = 0,
.n_aochan = 2, .n_aochan = 2,
.n_dichan = 16, .n_dichan = 16,
.n_dochan = 16, .n_dochan = 16,
@ -366,12 +365,10 @@ static const struct pcl812_board boardtypes[] = {
.IRQbits = 0xdcfc, .IRQbits = 0xdcfc,
.DMAbits = 0x0a, .DMAbits = 0x0a,
.io_range = PCLx1x_IORANGE, .io_range = PCLx1x_IORANGE,
.haveMPC508 = 0,
}, { }, {
.name = "pcl812pg", .name = "pcl812pg",
.board_type = boardPCL812PG, .board_type = boardPCL812PG,
.n_aichan = 16, .n_aichan = 16,
.n_aichan_diff = 0,
.n_aochan = 2, .n_aochan = 2,
.n_dichan = 16, .n_dichan = 16,
.n_dochan = 16, .n_dochan = 16,
@ -383,12 +380,10 @@ static const struct pcl812_board boardtypes[] = {
.IRQbits = 0xdcfc, .IRQbits = 0xdcfc,
.DMAbits = 0x0a, .DMAbits = 0x0a,
.io_range = PCLx1x_IORANGE, .io_range = PCLx1x_IORANGE,
.haveMPC508 = 0,
}, { }, {
.name = "acl8112pg", .name = "acl8112pg",
.board_type = boardPCL812PG, .board_type = boardPCL812PG,
.n_aichan = 16, .n_aichan = 16,
.n_aichan_diff = 0,
.n_aochan = 2, .n_aochan = 2,
.n_dichan = 16, .n_dichan = 16,
.n_dochan = 16, .n_dochan = 16,
@ -400,7 +395,6 @@ static const struct pcl812_board boardtypes[] = {
.IRQbits = 0xdcfc, .IRQbits = 0xdcfc,
.DMAbits = 0x0a, .DMAbits = 0x0a,
.io_range = PCLx1x_IORANGE, .io_range = PCLx1x_IORANGE,
.haveMPC508 = 0,
}, { }, {
.name = "acl8112dg", .name = "acl8112dg",
.board_type = boardACL8112, .board_type = boardACL8112,
@ -449,26 +443,18 @@ static const struct pcl812_board boardtypes[] = {
.rangelist_ai = &range_pcl813b_ai, .rangelist_ai = &range_pcl813b_ai,
.rangelist_ao = &range_unipolar5, .rangelist_ao = &range_unipolar5,
.IRQbits = 0x000c, .IRQbits = 0x000c,
.DMAbits = 0x00,
.io_range = PCLx1x_IORANGE, .io_range = PCLx1x_IORANGE,
.haveMPC508 = 0,
}, { }, {
.name = "a821pglnda", .name = "a821pglnda",
.board_type = boardA821, .board_type = boardA821,
.n_aichan = 16, .n_aichan = 16,
.n_aichan_diff = 8, .n_aichan_diff = 8,
.n_aochan = 0,
.n_dichan = 0,
.n_dochan = 0,
.ai_maxdata = 0x0fff, .ai_maxdata = 0x0fff,
.ai_ns_min = 10000, .ai_ns_min = 10000,
.i8254_osc_base = I8254_OSC_BASE_2MHZ, .i8254_osc_base = I8254_OSC_BASE_2MHZ,
.rangelist_ai = &range_pcl813b_ai, .rangelist_ai = &range_pcl813b_ai,
.rangelist_ao = NULL,
.IRQbits = 0x000c, .IRQbits = 0x000c,
.DMAbits = 0x00,
.io_range = PCLx1x_IORANGE, .io_range = PCLx1x_IORANGE,
.haveMPC508 = 0,
}, { }, {
.name = "a821pgh", .name = "a821pgh",
.board_type = boardA821, .board_type = boardA821,
@ -483,9 +469,7 @@ static const struct pcl812_board boardtypes[] = {
.rangelist_ai = &range_a821pgh_ai, .rangelist_ai = &range_a821pgh_ai,
.rangelist_ao = &range_unipolar5, .rangelist_ao = &range_unipolar5,
.IRQbits = 0x000c, .IRQbits = 0x000c,
.DMAbits = 0x00,
.io_range = PCLx1x_IORANGE, .io_range = PCLx1x_IORANGE,
.haveMPC508 = 0,
}, { }, {
.name = "a822pgl", .name = "a822pgl",
.board_type = boardACL8112, .board_type = boardACL8112,
@ -502,7 +486,6 @@ static const struct pcl812_board boardtypes[] = {
.IRQbits = 0xdcfc, .IRQbits = 0xdcfc,
.DMAbits = 0x0a, .DMAbits = 0x0a,
.io_range = PCLx1x_IORANGE, .io_range = PCLx1x_IORANGE,
.haveMPC508 = 0,
}, { }, {
.name = "a822pgh", .name = "a822pgh",
.board_type = boardACL8112, .board_type = boardACL8112,
@ -519,7 +502,6 @@ static const struct pcl812_board boardtypes[] = {
.IRQbits = 0xdcfc, .IRQbits = 0xdcfc,
.DMAbits = 0x0a, .DMAbits = 0x0a,
.io_range = PCLx1x_IORANGE, .io_range = PCLx1x_IORANGE,
.haveMPC508 = 0,
}, { }, {
.name = "a823pgl", .name = "a823pgl",
.board_type = boardACL8112, .board_type = boardACL8112,
@ -536,7 +518,6 @@ static const struct pcl812_board boardtypes[] = {
.IRQbits = 0xdcfc, .IRQbits = 0xdcfc,
.DMAbits = 0x0a, .DMAbits = 0x0a,
.io_range = PCLx1x_IORANGE, .io_range = PCLx1x_IORANGE,
.haveMPC508 = 0,
}, { }, {
.name = "a823pgh", .name = "a823pgh",
.board_type = boardACL8112, .board_type = boardACL8112,
@ -553,75 +534,34 @@ static const struct pcl812_board boardtypes[] = {
.IRQbits = 0xdcfc, .IRQbits = 0xdcfc,
.DMAbits = 0x0a, .DMAbits = 0x0a,
.io_range = PCLx1x_IORANGE, .io_range = PCLx1x_IORANGE,
.haveMPC508 = 0,
}, { }, {
.name = "pcl813", .name = "pcl813",
.board_type = boardPCL813, .board_type = boardPCL813,
.n_aichan = 32, .n_aichan = 32,
.n_aichan_diff = 0,
.n_aochan = 0,
.n_dichan = 0,
.n_dochan = 0,
.ai_maxdata = 0x0fff, .ai_maxdata = 0x0fff,
.ai_ns_min = 0,
.i8254_osc_base = 0,
.rangelist_ai = &range_pcl813b_ai, .rangelist_ai = &range_pcl813b_ai,
.rangelist_ao = NULL,
.IRQbits = 0x0000,
.DMAbits = 0x00,
.io_range = PCLx1x_IORANGE, .io_range = PCLx1x_IORANGE,
.haveMPC508 = 0,
}, { }, {
.name = "pcl813b", .name = "pcl813b",
.board_type = boardPCL813B, .board_type = boardPCL813B,
.n_aichan = 32, .n_aichan = 32,
.n_aichan_diff = 0,
.n_aochan = 0,
.n_dichan = 0,
.n_dochan = 0,
.ai_maxdata = 0x0fff, .ai_maxdata = 0x0fff,
.ai_ns_min = 0,
.i8254_osc_base = 0,
.rangelist_ai = &range_pcl813b_ai, .rangelist_ai = &range_pcl813b_ai,
.rangelist_ao = NULL,
.IRQbits = 0x0000,
.DMAbits = 0x00,
.io_range = PCLx1x_IORANGE, .io_range = PCLx1x_IORANGE,
.haveMPC508 = 0,
}, { }, {
.name = "acl8113", .name = "acl8113",
.board_type = boardACL8113, .board_type = boardACL8113,
.n_aichan = 32, .n_aichan = 32,
.n_aichan_diff = 0,
.n_aochan = 0,
.n_dichan = 0,
.n_dochan = 0,
.ai_maxdata = 0x0fff, .ai_maxdata = 0x0fff,
.ai_ns_min = 0,
.i8254_osc_base = 0,
.rangelist_ai = &range_acl8113_1_ai, .rangelist_ai = &range_acl8113_1_ai,
.rangelist_ao = NULL,
.IRQbits = 0x0000,
.DMAbits = 0x00,
.io_range = PCLx1x_IORANGE, .io_range = PCLx1x_IORANGE,
.haveMPC508 = 0,
}, { }, {
.name = "iso813", .name = "iso813",
.board_type = boardISO813, .board_type = boardISO813,
.n_aichan = 32, .n_aichan = 32,
.n_aichan_diff = 0,
.n_aochan = 0,
.n_dichan = 0,
.n_dochan = 0,
.ai_maxdata = 0x0fff, .ai_maxdata = 0x0fff,
.ai_ns_min = 0,
.i8254_osc_base = 0,
.rangelist_ai = &range_iso813_1_ai, .rangelist_ai = &range_iso813_1_ai,
.rangelist_ao = NULL,
.IRQbits = 0x0000,
.DMAbits = 0x00,
.io_range = PCLx1x_IORANGE, .io_range = PCLx1x_IORANGE,
.haveMPC508 = 0,
}, { }, {
.name = "acl8216", .name = "acl8216",
.board_type = boardACL8216, .board_type = boardACL8216,
@ -655,7 +595,6 @@ static const struct pcl812_board boardtypes[] = {
.IRQbits = 0xdcfc, .IRQbits = 0xdcfc,
.DMAbits = 0x0a, .DMAbits = 0x0a,
.io_range = PCLx1x_IORANGE, .io_range = PCLx1x_IORANGE,
.haveMPC508 = 0,
}, },
}; };